1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCFrameLowering.h"
18 #include "PPCSubtarget.h"
19 #include "PPCJITInfo.h"
20 #include "PPCInstrInfo.h"
21 #include "PPCISelLowering.h"
22 #include "PPCSelectionDAGInfo.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetData.h"
30 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
32 class PPCTargetMachine : public LLVMTargetMachine {
33 PPCSubtarget Subtarget;
34 const TargetData DataLayout; // Calculates type size & alignment
35 PPCInstrInfo InstrInfo;
36 PPCFrameLowering FrameLowering;
38 PPCTargetLowering TLInfo;
39 PPCSelectionDAGInfo TSInfo;
40 InstrItineraryData InstrItins;
43 PPCTargetMachine(const Target &T, StringRef TT,
44 StringRef CPU, StringRef FS, const TargetOptions &Options,
45 Reloc::Model RM, CodeModel::Model CM,
46 CodeGenOpt::Level OL, bool is64Bit);
48 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
49 virtual const PPCFrameLowering *getFrameLowering() const {
50 return &FrameLowering;
52 virtual PPCJITInfo *getJITInfo() { return &JITInfo; }
53 virtual const PPCTargetLowering *getTargetLowering() const {
56 virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const {
59 virtual const PPCRegisterInfo *getRegisterInfo() const {
60 return &InstrInfo.getRegisterInfo();
63 virtual const TargetData *getTargetData() const { return &DataLayout; }
64 virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; }
65 virtual const InstrItineraryData *getInstrItineraryData() const {
69 // Pass Pipeline Configuration
70 virtual bool addInstSelector(PassManagerBase &PM);
71 virtual bool addPreEmitPass(PassManagerBase &PM);
72 virtual bool addCodeEmitter(PassManagerBase &PM,
74 virtual bool getEnableTailMergeDefault() const;
77 /// PPC32TargetMachine - PowerPC 32-bit target machine.
79 class PPC32TargetMachine : public PPCTargetMachine {
80 virtual void anchor();
82 PPC32TargetMachine(const Target &T, StringRef TT,
83 StringRef CPU, StringRef FS, const TargetOptions &Options,
84 Reloc::Model RM, CodeModel::Model CM,
85 CodeGenOpt::Level OL);
88 /// PPC64TargetMachine - PowerPC 64-bit target machine.
90 class PPC64TargetMachine : public PPCTargetMachine {
91 virtual void anchor();
93 PPC64TargetMachine(const Target &T, StringRef TT,
94 StringRef CPU, StringRef FS, const TargetOptions &Options,
95 Reloc::Model RM, CodeModel::Model CM,
96 CodeGenOpt::Level OL);
99 } // end namespace llvm