1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCFrameLowering.h"
18 #include "PPCISelLowering.h"
19 #include "PPCInstrInfo.h"
20 #include "PPCJITInfo.h"
21 #include "PPCSelectionDAGInfo.h"
22 #include "PPCSubtarget.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/Target/TargetMachine.h"
28 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
30 class PPCTargetMachine : public LLVMTargetMachine {
31 PPCSubtarget Subtarget;
32 PPCSelectionDAGInfo TSInfo;
35 PPCTargetMachine(const Target &T, StringRef TT,
36 StringRef CPU, StringRef FS, const TargetOptions &Options,
37 Reloc::Model RM, CodeModel::Model CM,
38 CodeGenOpt::Level OL, bool is64Bit);
40 const PPCInstrInfo *getInstrInfo() const override {
41 return getSubtargetImpl()->getInstrInfo();
43 const PPCFrameLowering *getFrameLowering() const override {
44 return getSubtargetImpl()->getFrameLowering();
46 PPCJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); }
47 const PPCTargetLowering *getTargetLowering() const override {
48 return getSubtargetImpl()->getTargetLowering();
50 const PPCSelectionDAGInfo* getSelectionDAGInfo() const override {
53 const PPCRegisterInfo *getRegisterInfo() const override {
54 return &getInstrInfo()->getRegisterInfo();
57 const DataLayout *getDataLayout() const override {
58 return getSubtargetImpl()->getDataLayout();
60 const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
61 const InstrItineraryData *getInstrItineraryData() const override {
62 return &getSubtargetImpl()->getInstrItineraryData();
65 // Pass Pipeline Configuration
66 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
67 bool addCodeEmitter(PassManagerBase &PM,
68 JITCodeEmitter &JCE) override;
70 /// \brief Register PPC analysis passes with a pass manager.
71 void addAnalysisPasses(PassManagerBase &PM) override;
74 /// PPC32TargetMachine - PowerPC 32-bit target machine.
76 class PPC32TargetMachine : public PPCTargetMachine {
77 virtual void anchor();
79 PPC32TargetMachine(const Target &T, StringRef TT,
80 StringRef CPU, StringRef FS, const TargetOptions &Options,
81 Reloc::Model RM, CodeModel::Model CM,
82 CodeGenOpt::Level OL);
85 /// PPC64TargetMachine - PowerPC 64-bit target machine.
87 class PPC64TargetMachine : public PPCTargetMachine {
88 virtual void anchor();
90 PPC64TargetMachine(const Target &T, StringRef TT,
91 StringRef CPU, StringRef FS, const TargetOptions &Options,
92 Reloc::Model RM, CodeModel::Model CM,
93 CodeGenOpt::Level OL);
96 } // end namespace llvm