1 //===--------------- PPCVSXFMAMutate.cpp - VSX FMA Mutation ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass mutates the form of VSX FMA instructions to avoid unnecessary
13 //===----------------------------------------------------------------------===//
15 #include "PPCInstrInfo.h"
16 #include "MCTargetDesc/PPCPredicates.h"
18 #include "PPCInstrBuilder.h"
19 #include "PPCMachineFunctionInfo.h"
20 #include "PPCTargetMachine.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineFunctionPass.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/MachineMemOperand.h"
28 #include "llvm/CodeGen/MachineRegisterInfo.h"
29 #include "llvm/CodeGen/PseudoSourceValue.h"
30 #include "llvm/CodeGen/ScheduleDAG.h"
31 #include "llvm/CodeGen/SlotIndexes.h"
32 #include "llvm/CodeGen/StackMaps.h"
33 #include "llvm/MC/MCAsmInfo.h"
34 #include "llvm/Support/CommandLine.h"
35 #include "llvm/Support/Debug.h"
36 #include "llvm/Support/ErrorHandling.h"
37 #include "llvm/Support/TargetRegistry.h"
38 #include "llvm/Support/raw_ostream.h"
42 static cl::opt<bool> DisableVSXFMAMutate("disable-ppc-vsx-fma-mutation",
43 cl::desc("Disable VSX FMA instruction mutation"), cl::Hidden);
45 #define DEBUG_TYPE "ppc-vsx-fma-mutate"
47 namespace llvm { namespace PPC {
48 int getAltVSXFMAOpcode(uint16_t Opcode);
52 // PPCVSXFMAMutate pass - For copies between VSX registers and non-VSX registers
53 // (Altivec and scalar floating-point registers), we need to transform the
54 // copies into subregister copies with other restrictions.
55 struct PPCVSXFMAMutate : public MachineFunctionPass {
57 PPCVSXFMAMutate() : MachineFunctionPass(ID) {
58 initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
62 const PPCInstrInfo *TII;
65 bool processBlock(MachineBasicBlock &MBB) {
68 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
69 const TargetRegisterInfo *TRI = &TII->getRegisterInfo();
70 for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
74 // The default (A-type) VSX FMA form kills the addend (it is taken from
75 // the target register, which is then updated to reflect the result of
76 // the FMA). If the instruction, however, kills one of the registers
77 // used for the product, then we can use the M-form instruction (which
78 // will take that value from the to-be-defined register).
80 int AltOpc = PPC::getAltVSXFMAOpcode(MI->getOpcode());
84 // This pass is run after register coalescing, and so we're looking for
85 // a situation like this:
87 // %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9
88 // %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16,
89 // %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16
91 // %vreg9<def,tied1> = XSMADDADP %vreg9<tied0>, %vreg17, %vreg19,
92 // %RM<imp-use>; VSLRC:%vreg9,%vreg17,%vreg19
94 // Where we can eliminate the copy by changing from the A-type to the
95 // M-type instruction. Specifically, for this example, this means:
96 // %vreg5<def,tied1> = XSMADDADP %vreg5<tied0>, %vreg17, %vreg16,
97 // %RM<imp-use>; VSLRC:%vreg5,%vreg17,%vreg16
99 // %vreg16<def,tied1> = XSMADDMDP %vreg16<tied0>, %vreg18, %vreg9,
100 // %RM<imp-use>; VSLRC:%vreg16,%vreg18,%vreg9
101 // and we remove: %vreg5<def> = COPY %vreg9; VSLRC:%vreg5,%vreg9
103 SlotIndex FMAIdx = LIS->getInstructionIndex(MI);
105 VNInfo *AddendValNo =
106 LIS->getInterval(MI->getOperand(1).getReg()).Query(FMAIdx).valueIn();
107 MachineInstr *AddendMI = LIS->getInstructionFromIndex(AddendValNo->def);
109 // The addend and this instruction must be in the same block.
111 if (!AddendMI || AddendMI->getParent() != MI->getParent())
114 // The addend must be a full copy within the same register class.
116 if (!AddendMI->isFullCopy())
119 unsigned AddendSrcReg = AddendMI->getOperand(1).getReg();
120 if (TargetRegisterInfo::isVirtualRegister(AddendSrcReg)) {
121 if (MRI.getRegClass(AddendMI->getOperand(0).getReg()) !=
122 MRI.getRegClass(AddendSrcReg))
125 // If AddendSrcReg is a physical register, make sure the destination
126 // register class contains it.
127 if (!MRI.getRegClass(AddendMI->getOperand(0).getReg())
128 ->contains(AddendSrcReg))
132 // In theory, there could be other uses of the addend copy before this
133 // fma. We could deal with this, but that would require additional
134 // logic below and I suspect it will not occur in any relevant
135 // situations. Additionally, check whether the copy source is killed
136 // prior to the fma. In order to replace the addend here with the
137 // source of the copy, it must still be live here. We can't use
138 // interval testing for a physical register, so as long as we're
139 // walking the MIs we may as well test liveness here.
140 bool OtherUsers = false, KillsAddendSrc = false;
141 for (auto J = std::prev(I), JE = MachineBasicBlock::iterator(AddendMI);
143 if (J->readsVirtualRegister(AddendMI->getOperand(0).getReg())) {
147 if (J->modifiesRegister(AddendSrcReg, TRI) ||
148 J->killsRegister(AddendSrcReg, TRI)) {
149 KillsAddendSrc = true;
154 if (OtherUsers || KillsAddendSrc)
157 // Find one of the product operands that is killed by this instruction.
159 unsigned KilledProdOp = 0, OtherProdOp = 0;
160 if (LIS->getInterval(MI->getOperand(2).getReg())
161 .Query(FMAIdx).isKill()) {
164 } else if (LIS->getInterval(MI->getOperand(3).getReg())
165 .Query(FMAIdx).isKill()) {
170 // If there are no killed product operands, then this transformation is
171 // likely not profitable.
175 // For virtual registers, verify that the addend source register
176 // is live here (as should have been assured above).
177 assert((!TargetRegisterInfo::isVirtualRegister(AddendSrcReg) ||
178 LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) &&
179 "Addend source register is not live!");
181 // Transform: (O2 * O3) + O1 -> (O2 * O1) + O3.
183 unsigned AddReg = AddendMI->getOperand(1).getReg();
184 unsigned KilledProdReg = MI->getOperand(KilledProdOp).getReg();
185 unsigned OtherProdReg = MI->getOperand(OtherProdOp).getReg();
187 unsigned AddSubReg = AddendMI->getOperand(1).getSubReg();
188 unsigned KilledProdSubReg = MI->getOperand(KilledProdOp).getSubReg();
189 unsigned OtherProdSubReg = MI->getOperand(OtherProdOp).getSubReg();
191 bool AddRegKill = AddendMI->getOperand(1).isKill();
192 bool KilledProdRegKill = MI->getOperand(KilledProdOp).isKill();
193 bool OtherProdRegKill = MI->getOperand(OtherProdOp).isKill();
195 bool AddRegUndef = AddendMI->getOperand(1).isUndef();
196 bool KilledProdRegUndef = MI->getOperand(KilledProdOp).isUndef();
197 bool OtherProdRegUndef = MI->getOperand(OtherProdOp).isUndef();
199 unsigned OldFMAReg = MI->getOperand(0).getReg();
201 // The transformation doesn't work well with things like:
202 // %vreg5 = A-form-op %vreg5, %vreg11, %vreg5;
203 // so leave such things alone.
204 if (OldFMAReg == KilledProdReg)
207 assert(OldFMAReg == AddendMI->getOperand(0).getReg() &&
208 "Addend copy not tied to old FMA output!");
210 DEBUG(dbgs() << "VSX FMA Mutation:\n " << *MI;);
212 MI->getOperand(0).setReg(KilledProdReg);
213 MI->getOperand(1).setReg(KilledProdReg);
214 MI->getOperand(3).setReg(AddReg);
215 MI->getOperand(2).setReg(OtherProdReg);
217 MI->getOperand(0).setSubReg(KilledProdSubReg);
218 MI->getOperand(1).setSubReg(KilledProdSubReg);
219 MI->getOperand(3).setSubReg(AddSubReg);
220 MI->getOperand(2).setSubReg(OtherProdSubReg);
222 MI->getOperand(1).setIsKill(KilledProdRegKill);
223 MI->getOperand(3).setIsKill(AddRegKill);
224 MI->getOperand(2).setIsKill(OtherProdRegKill);
226 MI->getOperand(1).setIsUndef(KilledProdRegUndef);
227 MI->getOperand(3).setIsUndef(AddRegUndef);
228 MI->getOperand(2).setIsUndef(OtherProdRegUndef);
230 MI->setDesc(TII->get(AltOpc));
232 DEBUG(dbgs() << " -> " << *MI);
234 // The killed product operand was killed here, so we can reuse it now
235 // for the result of the fma.
237 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg);
238 VNInfo *FMAValNo = FMAInt.getVNInfoAt(FMAIdx.getRegSlot());
239 for (auto UI = MRI.reg_nodbg_begin(OldFMAReg), UE = MRI.reg_nodbg_end();
241 MachineOperand &UseMO = *UI;
242 MachineInstr *UseMI = UseMO.getParent();
245 // Don't replace the result register of the copy we're about to erase.
246 if (UseMI == AddendMI)
249 UseMO.setReg(KilledProdReg);
250 UseMO.setSubReg(KilledProdSubReg);
253 // Extend the live intervals of the killed product operand to hold the
256 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg);
257 for (LiveInterval::iterator AI = FMAInt.begin(), AE = FMAInt.end();
259 // Don't add the segment that corresponds to the original copy.
260 if (AI->valno == AddendValNo)
263 VNInfo *NewFMAValNo =
264 NewFMAInt.getNextValue(AI->start,
265 LIS->getVNInfoAllocator());
267 NewFMAInt.addSegment(LiveInterval::Segment(AI->start, AI->end,
270 DEBUG(dbgs() << " extended: " << NewFMAInt << '\n');
272 FMAInt.removeValNo(FMAValNo);
273 DEBUG(dbgs() << " trimmed: " << FMAInt << '\n');
275 // Remove the (now unused) copy.
277 DEBUG(dbgs() << " removing: " << *AddendMI << '\n');
278 LIS->RemoveMachineInstrFromMaps(AddendMI);
279 AddendMI->eraseFromParent();
288 bool runOnMachineFunction(MachineFunction &MF) override {
289 // If we don't have VSX then go ahead and return without doing
291 const PPCSubtarget &STI = MF.getSubtarget<PPCSubtarget>();
295 LIS = &getAnalysis<LiveIntervals>();
297 TII = STI.getInstrInfo();
299 bool Changed = false;
301 if (DisableVSXFMAMutate)
304 for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
305 MachineBasicBlock &B = *I++;
313 void getAnalysisUsage(AnalysisUsage &AU) const override {
314 AU.addRequired<LiveIntervals>();
315 AU.addPreserved<LiveIntervals>();
316 AU.addRequired<SlotIndexes>();
317 AU.addPreserved<SlotIndexes>();
318 MachineFunctionPass::getAnalysisUsage(AU);
323 INITIALIZE_PASS_BEGIN(PPCVSXFMAMutate, DEBUG_TYPE,
324 "PowerPC VSX FMA Mutation", false, false)
325 INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
326 INITIALIZE_PASS_DEPENDENCY(SlotIndexes)
327 INITIALIZE_PASS_END(PPCVSXFMAMutate, DEBUG_TYPE,
328 "PowerPC VSX FMA Mutation", false, false)
330 char &llvm::PPCVSXFMAMutateID = PPCVSXFMAMutate::ID;
332 char PPCVSXFMAMutate::ID = 0;
334 llvm::createPPCVSXFMAMutatePass() { return new PPCVSXFMAMutate(); }