1 //===- PowerPCInstrInfo.h - PowerPC Instruction Information -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the PowerPC implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef POWERPC_INSTRUCTIONINFO_H
15 #define POWERPC_INSTRUCTIONINFO_H
18 #include "PowerPCRegisterInfo.h"
19 #include "llvm/Target/TargetInstrInfo.h"
65 class PowerPCInstrInfo : public TargetInstrInfo {
66 const PowerPCRegisterInfo RI;
70 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
71 /// such, whenever a client has an instance of instruction info, it should
72 /// always be able to get register info as well (through this method).
74 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
77 // Return true if the instruction is a register to register move and
78 // leave the source and dest operands in the passed parameters.
80 virtual bool isMoveInstr(const MachineInstr& MI,
82 unsigned& destReg) const;
84 static unsigned invertPPCBranchOpcode(unsigned Opcode) {
86 default: assert(0 && "Unknown PPC branch opcode!");
87 case PPC::BEQ: return PPC::BNE;
88 case PPC::BNE: return PPC::BEQ;
89 case PPC::BLT: return PPC::BGE;
90 case PPC::BGE: return PPC::BLT;
91 case PPC::BGT: return PPC::BLE;
92 case PPC::BLE: return PPC::BGT;