3 * implement do-loop -> bdnz transform
4 * implement powerpc-64 for darwin
6 ===-------------------------------------------------------------------------===
8 Use the stfiwx instruction for:
10 void foo(float a, int *b) { *b = a; }
12 ===-------------------------------------------------------------------------===
14 unsigned short foo(float a) { return a; }
26 rlwinm r3, r2, 0, 16, 31
29 ===-------------------------------------------------------------------------===
31 Support 'update' load/store instructions. These are cracked on the G5, but are
34 ===-------------------------------------------------------------------------===
36 Should hint to the branch select pass that it doesn't need to print the second
37 unconditional branch, so we don't end up with things like:
38 b .LBBl42__2E_expand_function_8_674 ; loopentry.24
39 b .LBBl42__2E_expand_function_8_42 ; NewDefault
40 b .LBBl42__2E_expand_function_8_42 ; NewDefault
42 ===-------------------------------------------------------------------------===
47 if (X == 0x12345678) bar();
63 ===-------------------------------------------------------------------------===
65 Lump the constant pool for each function into ONE pic object, and reference
66 pieces of it as offsets from the start. For functions like this (contrived
67 to have lots of constants obviously):
69 double X(double Y) { return (Y*1.23 + 4.512)*2.34 + 14.38; }
74 lis r2, ha16(.CPI_X_0)
75 lfd f0, lo16(.CPI_X_0)(r2)
76 lis r2, ha16(.CPI_X_1)
77 lfd f2, lo16(.CPI_X_1)(r2)
79 lis r2, ha16(.CPI_X_2)
80 lfd f1, lo16(.CPI_X_2)(r2)
81 lis r2, ha16(.CPI_X_3)
82 lfd f2, lo16(.CPI_X_3)(r2)
86 It would be better to materialize .CPI_X into a register, then use immediates
87 off of the register to avoid the lis's. This is even more important in PIC
90 Note that this (and the static variable version) is discussed here for GCC:
91 http://gcc.gnu.org/ml/gcc-patches/2006-02/msg00133.html
93 ===-------------------------------------------------------------------------===
95 PIC Code Gen IPO optimization:
97 Squish small scalar globals together into a single global struct, allowing the
98 address of the struct to be CSE'd, avoiding PIC accesses (also reduces the size
99 of the GOT on targets with one).
101 Note that this is discussed here for GCC:
102 http://gcc.gnu.org/ml/gcc-patches/2006-02/msg00133.html
104 ===-------------------------------------------------------------------------===
106 Implement Newton-Rhapson method for improving estimate instructions to the
107 correct accuracy, and implementing divide as multiply by reciprocal when it has
108 more than one use. Itanium will want this too.
110 ===-------------------------------------------------------------------------===
112 #define ARRAY_LENGTH 16
117 unsigned int field0 : 6;
118 unsigned int field1 : 6;
119 unsigned int field2 : 6;
120 unsigned int field3 : 6;
121 unsigned int field4 : 3;
122 unsigned int field5 : 4;
123 unsigned int field6 : 1;
125 unsigned int field6 : 1;
126 unsigned int field5 : 4;
127 unsigned int field4 : 3;
128 unsigned int field3 : 6;
129 unsigned int field2 : 6;
130 unsigned int field1 : 6;
131 unsigned int field0 : 6;
140 typedef struct program_t {
141 union bitfield array[ARRAY_LENGTH];
147 void AdjustBitfields(program* prog, unsigned int fmt1)
149 unsigned int shift = 0;
150 unsigned int texCount = 0;
153 for (i = 0; i < 8; i++)
155 prog->array[i].bitfields.field0 = texCount;
156 prog->array[i].bitfields.field1 = texCount + 1;
157 prog->array[i].bitfields.field2 = texCount + 2;
158 prog->array[i].bitfields.field3 = texCount + 3;
160 texCount += (fmt1 >> shift) & 0x7;
165 In the loop above, the bitfield adds get generated as
166 (add (shl bitfield, C1), (shl C2, C1)) where C2 is 1, 2 or 3.
168 Since the input to the (or and, and) is an (add) rather than a (shl), the shift
169 doesn't get folded into the rlwimi instruction. We should ideally see through
170 things like this, rather than forcing llvm to generate the equivalent
172 (shl (add bitfield, C2), C1) with some kind of mask.
174 ===-------------------------------------------------------------------------===
178 int %f1(int %a, int %b) {
179 %tmp.1 = and int %a, 15 ; <int> [#uses=1]
180 %tmp.3 = and int %b, 240 ; <int> [#uses=1]
181 %tmp.4 = or int %tmp.3, %tmp.1 ; <int> [#uses=1]
185 without a copy. We make this currently:
188 rlwinm r2, r4, 0, 24, 27
189 rlwimi r2, r3, 0, 28, 31
193 The two-addr pass or RA needs to learn when it is profitable to commute an
194 instruction to avoid a copy AFTER the 2-addr instruction. The 2-addr pass
195 currently only commutes to avoid inserting a copy BEFORE the two addr instr.
197 ===-------------------------------------------------------------------------===
199 176.gcc contains a bunch of code like this (this occurs dozens of times):
201 int %test(uint %mode.0.i.0) {
202 %tmp.79 = cast uint %mode.0.i.0 to sbyte ; <sbyte> [#uses=1]
203 %tmp.80 = cast sbyte %tmp.79 to int ; <int> [#uses=1]
204 %tmp.81 = shl int %tmp.80, ubyte 16 ; <int> [#uses=1]
205 %tmp.82 = and int %tmp.81, 16711680
213 rlwinm r3, r2, 16, 8, 15
216 The extsb is obviously dead. This can be handled by a future thing like
217 MaskedValueIsZero that checks to see if bits are ever demanded (in this case,
218 the sign bits are never used, so we can fold the sext_inreg to nothing).
220 I'm seeing code like this:
224 rlwimi r4, r3, 16, 8, 15
226 in which the extsb is preventing the srwi from being nuked.
228 ===-------------------------------------------------------------------------===
230 Another example that occurs is:
232 uint %test(int %specbits.6.1) {
233 %tmp.2540 = shr int %specbits.6.1, ubyte 11 ; <int> [#uses=1]
234 %tmp.2541 = cast int %tmp.2540 to uint ; <uint> [#uses=1]
235 %tmp.2542 = shl uint %tmp.2541, ubyte 13 ; <uint> [#uses=1]
236 %tmp.2543 = and uint %tmp.2542, 8192 ; <uint> [#uses=1]
244 rlwinm r3, r2, 13, 18, 18
247 the srawi can be nuked by turning the SAR into a logical SHR (the sext bits are
248 dead), which I think can then be folded into the rlwinm.
250 ===-------------------------------------------------------------------------===
252 Compile offsets from allocas:
255 %X = alloca { int, int }
256 %Y = getelementptr {int,int}* %X, int 0, uint 1
260 into a single add, not two:
267 --> important for C++.
269 ===-------------------------------------------------------------------------===
271 int test3(int a, int b) { return (a < 0) ? a : 0; }
273 should be branch free code. LLVM is turning it into < 1 because of the RHS.
275 ===-------------------------------------------------------------------------===
277 No loads or stores of the constants should be needed:
279 struct foo { double X, Y; };
280 void xxx(struct foo F);
281 void bar() { struct foo R = { 1.0, 2.0 }; xxx(R); }
283 ===-------------------------------------------------------------------------===
285 Darwin Stub LICM optimization:
291 Have to go through an indirect stub if bar is external or linkonce. It would
292 be better to compile it as:
297 which only computes the address of bar once (instead of each time through the
298 stub). This is Darwin specific and would have to be done in the code generator.
299 Probably not a win on x86.
301 ===-------------------------------------------------------------------------===
303 PowerPC i1/setcc stuff (depends on subreg stuff):
305 Check out the PPC code we get for 'compare' in this testcase:
306 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19672
308 oof. on top of not doing the logical crnand instead of (mfcr, mfcr,
309 invert, invert, or), we then have to compare it against zero instead of
310 using the value already in a CR!
312 that should be something like
316 bne cr0, LBB_compare_4
324 rlwinm r7, r7, 30, 31, 31
325 rlwinm r8, r8, 30, 31, 31
331 bne cr0, LBB_compare_4 ; loopexit
333 ===-------------------------------------------------------------------------===
335 Simple IPO for argument passing, change:
336 void foo(int X, double Y, int Z) -> void foo(int X, int Z, double Y)
338 the Darwin ABI specifies that any integer arguments in the first 32 bytes worth
339 of arguments get assigned to r3 through r10. That is, if you have a function
340 foo(int, double, int) you get r3, f1, r6, since the 64 bit double ate up the
341 argument bytes for r4 and r5. The trick then would be to shuffle the argument
342 order for functions we can internalize so that the maximum number of
343 integers/pointers get passed in regs before you see any of the fp arguments.
345 Instead of implementing this, it would actually probably be easier to just
346 implement a PPC fastcc, where we could do whatever we wanted to the CC,
347 including having this work sanely.
349 ===-------------------------------------------------------------------------===
351 Fix Darwin FP-In-Integer Registers ABI
353 Darwin passes doubles in structures in integer registers, which is very very
354 bad. Add something like a BIT_CONVERT to LLVM, then do an i-p transformation
355 that percolates these things out of functions.
357 Check out how horrible this is:
358 http://gcc.gnu.org/ml/gcc/2005-10/msg01036.html
360 This is an extension of "interprocedural CC unmunging" that can't be done with
363 ===-------------------------------------------------------------------------===
365 Generate lwbrx and other byteswapping load/store instructions when reasonable.
367 ===-------------------------------------------------------------------------===
369 Implement TargetConstantVec, and set up PPC to custom lower ConstantVec into
370 TargetConstantVec's if it's one of the many forms that are algorithmically
371 computable using the spiffy altivec instructions.
373 ===-------------------------------------------------------------------------===
377 double %test(double %X) {
378 %Y = cast double %X to long
379 %Z = cast long %Y to double
396 without the lwz/stw's.
398 ===-------------------------------------------------------------------------===
405 return b * 3; // ignore the fact that this is always 3.
411 into something not this:
416 rlwinm r2, r2, 29, 31, 31
418 bgt cr0, LBB1_2 ; UnifiedReturnBlock
420 rlwinm r2, r2, 0, 31, 31
423 LBB1_2: ; UnifiedReturnBlock
427 In particular, the two compares (marked 1) could be shared by reversing one.
428 This could be done in the dag combiner, by swapping a BR_CC when a SETCC of the
429 same operands (but backwards) exists. In this case, this wouldn't save us
430 anything though, because the compares still wouldn't be shared.
432 ===-------------------------------------------------------------------------===
434 The legalizer should lower this:
436 bool %test(ulong %x) {
437 %tmp = setlt ulong %x, 4294967296
441 into "if x.high == 0", not:
457 noticed in 2005-05-11-Popcount-ffs-fls.c.
460 ===-------------------------------------------------------------------------===
462 We should custom expand setcc instead of pretending that we have it. That
463 would allow us to expose the access of the crbit after the mfcr, allowing
464 that access to be trivially folded into other ops. A simple example:
466 int foo(int a, int b) { return (a < b) << 4; }
473 rlwinm r2, r2, 29, 31, 31
477 ===-------------------------------------------------------------------------===
479 Fold add and sub with constant into non-extern, non-weak addresses so this:
482 void bar(int b) { a = b; }
483 void foo(unsigned char *c) {
500 lbz r2, lo16(_a+3)(r2)