R600: Add a pass that merge Vector Register
[oota-llvm.git] / lib / Target / R600 / AMDGPU.h
1 //===-- AMDGPU.h - MachineFunction passes hw codegen --------------*- C++ -*-=//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 /// \file
9 //===----------------------------------------------------------------------===//
10
11 #ifndef AMDGPU_H
12 #define AMDGPU_H
13
14 #include "AMDGPUTargetMachine.h"
15 #include "llvm/Support/TargetRegistry.h"
16 #include "llvm/Target/TargetMachine.h"
17
18 namespace llvm {
19
20 class FunctionPass;
21 class AMDGPUTargetMachine;
22
23 // R600 Passes
24 FunctionPass* createR600TextureIntrinsicsReplacer();
25 FunctionPass* createR600KernelParametersPass(const DataLayout *TD);
26 FunctionPass *createR600VectorRegMerger(TargetMachine &tm);
27 FunctionPass *createR600ExpandSpecialInstrsPass(TargetMachine &tm);
28 FunctionPass *createR600EmitClauseMarkers(TargetMachine &tm);
29 FunctionPass *createR600Packetizer(TargetMachine &tm);
30 FunctionPass *createR600ControlFlowFinalizer(TargetMachine &tm);
31
32 // SI Passes
33 FunctionPass *createSIAnnotateControlFlowPass();
34 FunctionPass *createSILowerControlFlowPass(TargetMachine &tm);
35 FunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS);
36 FunctionPass *createSIInsertWaits(TargetMachine &tm);
37
38 // Passes common to R600 and SI
39 Pass *createAMDGPUStructurizeCFGPass();
40 FunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm);
41 FunctionPass* createAMDGPUIndirectAddressingPass(TargetMachine &tm);
42
43 } // End namespace llvm
44
45 namespace ShaderType {
46   enum Type {
47     PIXEL = 0,
48     VERTEX = 1,
49     GEOMETRY = 2,
50     COMPUTE = 3
51   };
52 }
53
54 #endif // AMDGPU_H