1 //===- AMDGPUMCInstLower.cpp - Lower AMDGPU MachineInstr to an MCInst -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief Code to lower AMDGPU MachineInstrs to their corresponding MCInst.
13 //===----------------------------------------------------------------------===//
16 #include "AMDGPUMCInstLower.h"
17 #include "AMDGPUAsmPrinter.h"
18 #include "AMDGPUTargetMachine.h"
19 #include "InstPrinter/AMDGPUInstPrinter.h"
20 #include "R600InstrInfo.h"
21 #include "SIInstrInfo.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineInstr.h"
24 #include "llvm/IR/Constants.h"
25 #include "llvm/IR/GlobalVariable.h"
26 #include "llvm/MC/MCCodeEmitter.h"
27 #include "llvm/MC/MCContext.h"
28 #include "llvm/MC/MCExpr.h"
29 #include "llvm/MC/MCInst.h"
30 #include "llvm/MC/MCObjectStreamer.h"
31 #include "llvm/MC/MCStreamer.h"
32 #include "llvm/Support/ErrorHandling.h"
33 #include "llvm/Support/Format.h"
38 AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st):
42 enum AMDGPUMCInstLower::SISubtarget
43 AMDGPUMCInstLower::AMDGPUSubtargetToSISubtarget(unsigned) const {
44 return AMDGPUMCInstLower::SI;
47 unsigned AMDGPUMCInstLower::getMCOpcode(unsigned MIOpcode) const {
49 int MCOpcode = AMDGPU::getMCOpcode(MIOpcode,
50 AMDGPUSubtargetToSISubtarget(ST.getGeneration()));
57 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
59 OutMI.setOpcode(getMCOpcode(MI->getOpcode()));
61 for (const MachineOperand &MO : MI->explicit_operands()) {
63 switch (MO.getType()) {
65 llvm_unreachable("unknown operand type");
66 case MachineOperand::MO_FPImmediate: {
67 const APFloat &FloatValue = MO.getFPImm()->getValueAPF();
68 assert(&FloatValue.getSemantics() == &APFloat::IEEEsingle &&
69 "Only floating point immediates are supported at the moment.");
70 MCOp = MCOperand::CreateFPImm(FloatValue.convertToFloat());
73 case MachineOperand::MO_Immediate:
74 MCOp = MCOperand::CreateImm(MO.getImm());
76 case MachineOperand::MO_Register:
77 MCOp = MCOperand::CreateReg(MO.getReg());
79 case MachineOperand::MO_MachineBasicBlock:
80 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
81 MO.getMBB()->getSymbol(), Ctx));
83 case MachineOperand::MO_GlobalAddress: {
84 const GlobalValue *GV = MO.getGlobal();
85 MCSymbol *Sym = Ctx.GetOrCreateSymbol(StringRef(GV->getName()));
86 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(Sym, Ctx));
89 case MachineOperand::MO_TargetIndex: {
90 assert(MO.getIndex() == AMDGPU::TI_CONSTDATA_START);
91 MCSymbol *Sym = Ctx.GetOrCreateSymbol(StringRef(END_OF_TEXT_LABEL_NAME));
92 const MCSymbolRefExpr *Expr = MCSymbolRefExpr::Create(Sym, Ctx);
93 MCOp = MCOperand::CreateExpr(Expr);
97 OutMI.addOperand(MCOp);
101 void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
102 AMDGPUMCInstLower MCInstLowering(OutContext,
103 MF->getTarget().getSubtarget<AMDGPUSubtarget>());
107 if (!TM.getSubtargetImpl()->getInstrInfo()->verifyInstruction(MI, Err)) {
108 errs() << "Warning: Illegal instruction detected: " << Err << "\n";
112 if (MI->isBundle()) {
113 const MachineBasicBlock *MBB = MI->getParent();
114 MachineBasicBlock::const_instr_iterator I = MI;
116 while (I != MBB->end() && I->isInsideBundle()) {
122 MCInstLowering.lower(MI, TmpInst);
123 EmitToStreamer(OutStreamer, TmpInst);
126 // Disassemble instruction/operands to text.
127 DisasmLines.resize(DisasmLines.size() + 1);
128 std::string &DisasmLine = DisasmLines.back();
129 raw_string_ostream DisasmStream(DisasmLine);
131 AMDGPUInstPrinter InstPrinter(*TM.getMCAsmInfo(),
132 *TM.getSubtargetImpl()->getInstrInfo(),
133 *TM.getSubtargetImpl()->getRegisterInfo());
134 InstPrinter.printInst(&TmpInst, DisasmStream, StringRef());
136 // Disassemble instruction/operands to hex representation.
137 SmallVector<MCFixup, 4> Fixups;
138 SmallVector<char, 16> CodeBytes;
139 raw_svector_ostream CodeStream(CodeBytes);
141 MCObjectStreamer &ObjStreamer = (MCObjectStreamer &)OutStreamer;
142 MCCodeEmitter &InstEmitter = ObjStreamer.getAssembler().getEmitter();
143 InstEmitter.EncodeInstruction(TmpInst, CodeStream, Fixups,
144 TM.getSubtarget<MCSubtargetInfo>());
147 HexLines.resize(HexLines.size() + 1);
148 std::string &HexLine = HexLines.back();
149 raw_string_ostream HexStream(HexLine);
151 for (size_t i = 0; i < CodeBytes.size(); i += 4) {
152 unsigned int CodeDWord = *(unsigned int *)&CodeBytes[i];
153 HexStream << format("%s%08X", (i > 0 ? " " : ""), CodeDWord);
156 DisasmStream.flush();
157 DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLine.size());