1 //===-- AMDGPUStructurizeCFG.cpp - ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// The pass implemented in this file transforms the programs control flow
12 /// graph into a form that's suitable for code generation on hardware that
13 /// implements control flow by execution masking. This currently includes all
14 /// AMD GPUs but may as well be useful for other types of hardware.
16 //===----------------------------------------------------------------------===//
19 #include "llvm/ADT/SCCIterator.h"
20 #include "llvm/ADT/MapVector.h"
21 #include "llvm/Analysis/RegionInfo.h"
22 #include "llvm/Analysis/RegionIterator.h"
23 #include "llvm/Analysis/RegionPass.h"
24 #include "llvm/IR/Module.h"
25 #include "llvm/Transforms/Utils/SSAUpdater.h"
26 #include "llvm/Support/PatternMatch.h"
29 using namespace llvm::PatternMatch;
33 // Definition of the complex types used in this pass.
35 typedef std::pair<BasicBlock *, Value *> BBValuePair;
37 typedef SmallVector<RegionNode*, 8> RNVector;
38 typedef SmallVector<BasicBlock*, 8> BBVector;
39 typedef SmallVector<BranchInst*, 8> BranchVector;
40 typedef SmallVector<BBValuePair, 2> BBValueVector;
42 typedef SmallPtrSet<BasicBlock *, 8> BBSet;
44 typedef MapVector<PHINode *, BBValueVector> PhiMap;
45 typedef MapVector<BasicBlock *, BBVector> BB2BBVecMap;
47 typedef DenseMap<DomTreeNode *, unsigned> DTN2UnsignedMap;
48 typedef DenseMap<BasicBlock *, PhiMap> BBPhiMap;
49 typedef DenseMap<BasicBlock *, Value *> BBPredicates;
50 typedef DenseMap<BasicBlock *, BBPredicates> PredMap;
51 typedef DenseMap<BasicBlock *, BasicBlock*> BB2BBMap;
53 // The name for newly created blocks.
55 static const char *FlowBlockName = "Flow";
57 /// @brief Find the nearest common dominator for multiple BasicBlocks
59 /// Helper class for AMDGPUStructurizeCFG
60 /// TODO: Maybe move into common code
61 class NearestCommonDominator {
65 DTN2UnsignedMap IndexMap;
69 bool ExplicitMentioned;
72 /// \brief Start a new query
73 NearestCommonDominator(DominatorTree *DomTree) {
78 /// \brief Add BB to the resulting dominator
79 void addBlock(BasicBlock *BB, bool Remember = true) {
81 DomTreeNode *Node = DT->getNode(BB);
84 unsigned Numbering = 0;
85 for (;Node;Node = Node->getIDom())
86 IndexMap[Node] = ++Numbering;
89 ExplicitMentioned = Remember;
93 for (;Node;Node = Node->getIDom())
94 if (IndexMap.count(Node))
99 assert(Node && "Dominator tree invalid!");
101 unsigned Numbering = IndexMap[Node];
102 if (Numbering > ResultIndex) {
103 Result = Node->getBlock();
104 ResultIndex = Numbering;
105 ExplicitMentioned = Remember && (Result == BB);
106 } else if (Numbering == ResultIndex) {
107 ExplicitMentioned |= Remember;
111 /// \brief Is "Result" one of the BBs added with "Remember" = True?
112 bool wasResultExplicitMentioned() {
113 return ExplicitMentioned;
116 /// \brief Get the query result
117 BasicBlock *getResult() {
122 /// @brief Transforms the control flow graph on one single entry/exit region
125 /// After the transform all "If"/"Then"/"Else" style control flow looks like
137 /// | | 1 = "If" block, calculates the condition
138 /// 4 | 2 = "Then" subregion, runs if the condition is true
139 /// | / 3 = "Flow" blocks, newly inserted flow blocks, rejoins the flow
140 /// |/ 4 = "Else" optional subregion, runs if the condition is false
141 /// 5 5 = "End" block, also rejoins the control flow
144 /// Control flow is expressed as a branch where the true exit goes into the
145 /// "Then"/"Else" region, while the false exit skips the region
146 /// The condition for the optional "Else" region is expressed as a PHI node.
147 /// The incomming values of the PHI node are true for the "If" edge and false
148 /// for the "Then" edge.
150 /// Additionally to that even complicated loops look like this:
157 /// | / 1 = "Entry" block
158 /// |/ 2 = "Loop" optional subregion, with all exits at "Flow" block
159 /// 3 3 = "Flow" block, with back edge to entry block
163 /// The back edge of the "Flow" block is always on the false side of the branch
164 /// while the true side continues the general flow. So the loop condition
165 /// consist of a network of PHI nodes where the true incoming values expresses
166 /// breaks and the false values expresses continue states.
167 class AMDGPUStructurizeCFG : public RegionPass {
172 ConstantInt *BoolTrue;
173 ConstantInt *BoolFalse;
174 UndefValue *BoolUndef;
177 Region *ParentRegion;
184 BBPhiMap DeletedPhis;
185 BB2BBVecMap AddedPhis;
188 BranchVector Conditions;
192 BranchVector LoopConds;
194 RegionNode *PrevNode;
198 void analyzeLoops(RegionNode *N);
200 Value *invert(Value *Condition);
202 Value *buildCondition(BranchInst *Term, unsigned Idx, bool Invert);
204 void gatherPredicates(RegionNode *N);
208 void insertConditions(bool Loops);
210 void delPhiValues(BasicBlock *From, BasicBlock *To);
212 void addPhiValues(BasicBlock *From, BasicBlock *To);
216 void killTerminator(BasicBlock *BB);
218 void changeExit(RegionNode *Node, BasicBlock *NewExit,
219 bool IncludeDominator);
221 BasicBlock *getNextFlow(BasicBlock *Dominator);
223 BasicBlock *needPrefix(bool NeedEmpty);
225 BasicBlock *needPostfix(BasicBlock *Flow, bool ExitUseAllowed);
227 void setPrevNode(BasicBlock *BB);
229 bool dominatesPredicates(BasicBlock *BB, RegionNode *Node);
231 bool isPredictableTrue(RegionNode *Node);
233 void wireFlow(bool ExitUseAllowed, BasicBlock *LoopEnd);
235 void handleLoops(bool ExitUseAllowed, BasicBlock *LoopEnd);
242 AMDGPUStructurizeCFG():
245 initializeRegionInfoPass(*PassRegistry::getPassRegistry());
248 using Pass::doInitialization;
249 virtual bool doInitialization(Region *R, RGPassManager &RGM);
251 virtual bool runOnRegion(Region *R, RGPassManager &RGM);
253 virtual const char *getPassName() const {
254 return "AMDGPU simplify control flow";
257 void getAnalysisUsage(AnalysisUsage &AU) const {
259 AU.addRequired<DominatorTree>();
260 AU.addPreserved<DominatorTree>();
261 RegionPass::getAnalysisUsage(AU);
266 } // end anonymous namespace
268 char AMDGPUStructurizeCFG::ID = 0;
270 /// \brief Initialize the types and constants used in the pass
271 bool AMDGPUStructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
272 LLVMContext &Context = R->getEntry()->getContext();
274 Boolean = Type::getInt1Ty(Context);
275 BoolTrue = ConstantInt::getTrue(Context);
276 BoolFalse = ConstantInt::getFalse(Context);
277 BoolUndef = UndefValue::get(Boolean);
282 /// \brief Build up the general order of nodes
283 void AMDGPUStructurizeCFG::orderNodes() {
284 scc_iterator<Region *> I = scc_begin(ParentRegion),
285 E = scc_end(ParentRegion);
286 for (Order.clear(); I != E; ++I) {
287 std::vector<RegionNode *> &Nodes = *I;
288 Order.append(Nodes.begin(), Nodes.end());
292 /// \brief Determine the end of the loops
293 void AMDGPUStructurizeCFG::analyzeLoops(RegionNode *N) {
295 if (N->isSubRegion()) {
296 // Test for exit as back edge
297 BasicBlock *Exit = N->getNodeAs<Region>()->getExit();
298 if (Visited.count(Exit))
299 Loops[Exit] = N->getEntry();
302 // Test for sucessors as back edge
303 BasicBlock *BB = N->getNodeAs<BasicBlock>();
304 BranchInst *Term = cast<BranchInst>(BB->getTerminator());
306 for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
307 BasicBlock *Succ = Term->getSuccessor(i);
309 if (Visited.count(Succ))
315 /// \brief Invert the given condition
316 Value *AMDGPUStructurizeCFG::invert(Value *Condition) {
318 // First: Check if it's a constant
319 if (Condition == BoolTrue)
322 if (Condition == BoolFalse)
325 if (Condition == BoolUndef)
328 // Second: If the condition is already inverted, return the original value
329 if (match(Condition, m_Not(m_Value(Condition))))
332 // Third: Check all the users for an invert
333 BasicBlock *Parent = cast<Instruction>(Condition)->getParent();
334 for (Value::use_iterator I = Condition->use_begin(),
335 E = Condition->use_end(); I != E; ++I) {
337 Instruction *User = dyn_cast<Instruction>(*I);
338 if (!User || User->getParent() != Parent)
341 if (match(*I, m_Not(m_Specific(Condition))))
345 // Last option: Create a new instruction
346 return BinaryOperator::CreateNot(Condition, "", Parent->getTerminator());
349 /// \brief Build the condition for one edge
350 Value *AMDGPUStructurizeCFG::buildCondition(BranchInst *Term, unsigned Idx,
352 Value *Cond = Invert ? BoolFalse : BoolTrue;
353 if (Term->isConditional()) {
354 Cond = Term->getCondition();
362 /// \brief Analyze the predecessors of each block and build up predicates
363 void AMDGPUStructurizeCFG::gatherPredicates(RegionNode *N) {
365 RegionInfo *RI = ParentRegion->getRegionInfo();
366 BasicBlock *BB = N->getEntry();
367 BBPredicates &Pred = Predicates[BB];
368 BBPredicates &LPred = LoopPreds[BB];
370 for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
373 // Ignore it if it's a branch from outside into our region entry
374 if (!ParentRegion->contains(*PI))
377 Region *R = RI->getRegionFor(*PI);
378 if (R == ParentRegion) {
380 // It's a top level block in our region
381 BranchInst *Term = cast<BranchInst>((*PI)->getTerminator());
382 for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
383 BasicBlock *Succ = Term->getSuccessor(i);
387 if (Visited.count(*PI)) {
388 // Normal forward edge
389 if (Term->isConditional()) {
390 // Try to treat it like an ELSE block
391 BasicBlock *Other = Term->getSuccessor(!i);
392 if (Visited.count(Other) && !Loops.count(Other) &&
393 !Pred.count(Other) && !Pred.count(*PI)) {
395 Pred[Other] = BoolFalse;
396 Pred[*PI] = BoolTrue;
400 Pred[*PI] = buildCondition(Term, i, false);
404 LPred[*PI] = buildCondition(Term, i, true);
410 // It's an exit from a sub region
411 while(R->getParent() != ParentRegion)
414 // Edge from inside a subregion to its entry, ignore it
418 BasicBlock *Entry = R->getEntry();
419 if (Visited.count(Entry))
420 Pred[Entry] = BoolTrue;
422 LPred[Entry] = BoolFalse;
427 /// \brief Collect various loop and predicate infos
428 void AMDGPUStructurizeCFG::collectInfos() {
437 // Reset the visited nodes
440 for (RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend();
443 // Analyze all the conditions leading to a node
444 gatherPredicates(*OI);
446 // Remember that we've seen this node
447 Visited.insert((*OI)->getEntry());
449 // Find the last back edges
454 /// \brief Insert the missing branch conditions
455 void AMDGPUStructurizeCFG::insertConditions(bool Loops) {
456 BranchVector &Conds = Loops ? LoopConds : Conditions;
457 Value *Default = Loops ? BoolTrue : BoolFalse;
458 SSAUpdater PhiInserter;
460 for (BranchVector::iterator I = Conds.begin(),
461 E = Conds.end(); I != E; ++I) {
463 BranchInst *Term = *I;
464 assert(Term->isConditional());
466 BasicBlock *Parent = Term->getParent();
467 BasicBlock *SuccTrue = Term->getSuccessor(0);
468 BasicBlock *SuccFalse = Term->getSuccessor(1);
470 PhiInserter.Initialize(Boolean, "");
471 PhiInserter.AddAvailableValue(&Func->getEntryBlock(), Default);
472 PhiInserter.AddAvailableValue(Loops ? SuccFalse : Parent, Default);
474 BBPredicates &Preds = Loops ? LoopPreds[SuccFalse] : Predicates[SuccTrue];
476 NearestCommonDominator Dominator(DT);
477 Dominator.addBlock(Parent, false);
479 Value *ParentValue = 0;
480 for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
483 if (PI->first == Parent) {
484 ParentValue = PI->second;
487 PhiInserter.AddAvailableValue(PI->first, PI->second);
488 Dominator.addBlock(PI->first);
492 Term->setCondition(ParentValue);
494 if (!Dominator.wasResultExplicitMentioned())
495 PhiInserter.AddAvailableValue(Dominator.getResult(), Default);
497 Term->setCondition(PhiInserter.GetValueInMiddleOfBlock(Parent));
502 /// \brief Remove all PHI values coming from "From" into "To" and remember
503 /// them in DeletedPhis
504 void AMDGPUStructurizeCFG::delPhiValues(BasicBlock *From, BasicBlock *To) {
505 PhiMap &Map = DeletedPhis[To];
506 for (BasicBlock::iterator I = To->begin(), E = To->end();
507 I != E && isa<PHINode>(*I);) {
509 PHINode &Phi = cast<PHINode>(*I++);
510 while (Phi.getBasicBlockIndex(From) != -1) {
511 Value *Deleted = Phi.removeIncomingValue(From, false);
512 Map[&Phi].push_back(std::make_pair(From, Deleted));
517 /// \brief Add a dummy PHI value as soon as we knew the new predecessor
518 void AMDGPUStructurizeCFG::addPhiValues(BasicBlock *From, BasicBlock *To) {
519 for (BasicBlock::iterator I = To->begin(), E = To->end();
520 I != E && isa<PHINode>(*I);) {
522 PHINode &Phi = cast<PHINode>(*I++);
523 Value *Undef = UndefValue::get(Phi.getType());
524 Phi.addIncoming(Undef, From);
526 AddedPhis[To].push_back(From);
529 /// \brief Add the real PHI value as soon as everything is set up
530 void AMDGPUStructurizeCFG::setPhiValues() {
533 for (BB2BBVecMap::iterator AI = AddedPhis.begin(), AE = AddedPhis.end();
536 BasicBlock *To = AI->first;
537 BBVector &From = AI->second;
539 if (!DeletedPhis.count(To))
542 PhiMap &Map = DeletedPhis[To];
543 for (PhiMap::iterator PI = Map.begin(), PE = Map.end();
546 PHINode *Phi = PI->first;
547 Value *Undef = UndefValue::get(Phi->getType());
548 Updater.Initialize(Phi->getType(), "");
549 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
550 Updater.AddAvailableValue(To, Undef);
552 NearestCommonDominator Dominator(DT);
553 Dominator.addBlock(To, false);
554 for (BBValueVector::iterator VI = PI->second.begin(),
555 VE = PI->second.end(); VI != VE; ++VI) {
557 Updater.AddAvailableValue(VI->first, VI->second);
558 Dominator.addBlock(VI->first);
561 if (!Dominator.wasResultExplicitMentioned())
562 Updater.AddAvailableValue(Dominator.getResult(), Undef);
564 for (BBVector::iterator FI = From.begin(), FE = From.end();
567 int Idx = Phi->getBasicBlockIndex(*FI);
569 Phi->setIncomingValue(Idx, Updater.GetValueAtEndOfBlock(*FI));
573 DeletedPhis.erase(To);
575 assert(DeletedPhis.empty());
578 /// \brief Remove phi values from all successors and then remove the terminator.
579 void AMDGPUStructurizeCFG::killTerminator(BasicBlock *BB) {
580 TerminatorInst *Term = BB->getTerminator();
584 for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB);
587 delPhiValues(BB, *SI);
590 Term->eraseFromParent();
593 /// \brief Let node exit(s) point to NewExit
594 void AMDGPUStructurizeCFG::changeExit(RegionNode *Node, BasicBlock *NewExit,
595 bool IncludeDominator) {
597 if (Node->isSubRegion()) {
598 Region *SubRegion = Node->getNodeAs<Region>();
599 BasicBlock *OldExit = SubRegion->getExit();
600 BasicBlock *Dominator = 0;
602 // Find all the edges from the sub region to the exit
603 for (pred_iterator I = pred_begin(OldExit), E = pred_end(OldExit);
606 BasicBlock *BB = *I++;
607 if (!SubRegion->contains(BB))
610 // Modify the edges to point to the new exit
611 delPhiValues(BB, OldExit);
612 BB->getTerminator()->replaceUsesOfWith(OldExit, NewExit);
613 addPhiValues(BB, NewExit);
615 // Find the new dominator (if requested)
616 if (IncludeDominator) {
620 Dominator = DT->findNearestCommonDominator(Dominator, BB);
624 // Change the dominator (if requested)
626 DT->changeImmediateDominator(NewExit, Dominator);
628 // Update the region info
629 SubRegion->replaceExit(NewExit);
632 BasicBlock *BB = Node->getNodeAs<BasicBlock>();
634 BranchInst::Create(NewExit, BB);
635 addPhiValues(BB, NewExit);
636 if (IncludeDominator)
637 DT->changeImmediateDominator(NewExit, BB);
641 /// \brief Create a new flow node and update dominator tree and region info
642 BasicBlock *AMDGPUStructurizeCFG::getNextFlow(BasicBlock *Dominator) {
643 LLVMContext &Context = Func->getContext();
644 BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() :
645 Order.back()->getEntry();
646 BasicBlock *Flow = BasicBlock::Create(Context, FlowBlockName,
648 DT->addNewBlock(Flow, Dominator);
649 ParentRegion->getRegionInfo()->setRegionFor(Flow, ParentRegion);
653 /// \brief Create a new or reuse the previous node as flow node
654 BasicBlock *AMDGPUStructurizeCFG::needPrefix(bool NeedEmpty) {
656 BasicBlock *Entry = PrevNode->getEntry();
658 if (!PrevNode->isSubRegion()) {
659 killTerminator(Entry);
660 if (!NeedEmpty || Entry->getFirstInsertionPt() == Entry->end())
665 // create a new flow node
666 BasicBlock *Flow = getNextFlow(Entry);
669 changeExit(PrevNode, Flow, true);
670 PrevNode = ParentRegion->getBBNode(Flow);
674 /// \brief Returns the region exit if possible, otherwise just a new flow node
675 BasicBlock *AMDGPUStructurizeCFG::needPostfix(BasicBlock *Flow,
676 bool ExitUseAllowed) {
678 if (Order.empty() && ExitUseAllowed) {
679 BasicBlock *Exit = ParentRegion->getExit();
680 DT->changeImmediateDominator(Exit, Flow);
681 addPhiValues(Flow, Exit);
684 return getNextFlow(Flow);
687 /// \brief Set the previous node
688 void AMDGPUStructurizeCFG::setPrevNode(BasicBlock *BB) {
689 PrevNode = ParentRegion->contains(BB) ? ParentRegion->getBBNode(BB) : 0;
692 /// \brief Does BB dominate all the predicates of Node ?
693 bool AMDGPUStructurizeCFG::dominatesPredicates(BasicBlock *BB, RegionNode *Node) {
694 BBPredicates &Preds = Predicates[Node->getEntry()];
695 for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
698 if (!DT->dominates(BB, PI->first))
704 /// \brief Can we predict that this node will always be called?
705 bool AMDGPUStructurizeCFG::isPredictableTrue(RegionNode *Node) {
707 BBPredicates &Preds = Predicates[Node->getEntry()];
708 bool Dominated = false;
710 // Regionentry is always true
714 for (BBPredicates::iterator I = Preds.begin(), E = Preds.end();
717 if (I->second != BoolTrue)
720 if (!Dominated && DT->dominates(I->first, PrevNode->getEntry()))
724 // TODO: The dominator check is too strict
728 /// Take one node from the order vector and wire it up
729 void AMDGPUStructurizeCFG::wireFlow(bool ExitUseAllowed,
730 BasicBlock *LoopEnd) {
732 RegionNode *Node = Order.pop_back_val();
733 Visited.insert(Node->getEntry());
735 if (isPredictableTrue(Node)) {
736 // Just a linear flow
738 changeExit(PrevNode, Node->getEntry(), true);
743 // Insert extra prefix node (or reuse last one)
744 BasicBlock *Flow = needPrefix(false);
746 // Insert extra postfix node (or use exit instead)
747 BasicBlock *Entry = Node->getEntry();
748 BasicBlock *Next = needPostfix(Flow, ExitUseAllowed);
750 // let it point to entry and next block
751 Conditions.push_back(BranchInst::Create(Entry, Next, BoolUndef, Flow));
752 addPhiValues(Flow, Entry);
753 DT->changeImmediateDominator(Entry, Flow);
756 while (!Order.empty() && !Visited.count(LoopEnd) &&
757 dominatesPredicates(Entry, Order.back())) {
758 handleLoops(false, LoopEnd);
761 changeExit(PrevNode, Next, false);
766 void AMDGPUStructurizeCFG::handleLoops(bool ExitUseAllowed,
767 BasicBlock *LoopEnd) {
768 RegionNode *Node = Order.back();
769 BasicBlock *LoopStart = Node->getEntry();
771 if (!Loops.count(LoopStart)) {
772 wireFlow(ExitUseAllowed, LoopEnd);
776 if (!isPredictableTrue(Node))
777 LoopStart = needPrefix(true);
779 LoopEnd = Loops[Node->getEntry()];
780 wireFlow(false, LoopEnd);
781 while (!Visited.count(LoopEnd)) {
782 handleLoops(false, LoopEnd);
785 // Create an extra loop end node
786 LoopEnd = needPrefix(false);
787 BasicBlock *Next = needPostfix(LoopEnd, ExitUseAllowed);
788 LoopConds.push_back(BranchInst::Create(Next, LoopStart,
789 BoolUndef, LoopEnd));
790 addPhiValues(LoopEnd, LoopStart);
794 /// After this function control flow looks like it should be, but
795 /// branches and PHI nodes only have undefined conditions.
796 void AMDGPUStructurizeCFG::createFlow() {
798 BasicBlock *Exit = ParentRegion->getExit();
799 bool EntryDominatesExit = DT->dominates(ParentRegion->getEntry(), Exit);
809 while (!Order.empty()) {
810 handleLoops(EntryDominatesExit, 0);
814 changeExit(PrevNode, Exit, EntryDominatesExit);
816 assert(EntryDominatesExit);
819 /// Handle a rare case where the disintegrated nodes instructions
820 /// no longer dominate all their uses. Not sure if this is really nessasary
821 void AMDGPUStructurizeCFG::rebuildSSA() {
823 for (Region::block_iterator I = ParentRegion->block_begin(),
824 E = ParentRegion->block_end();
828 for (BasicBlock::iterator II = BB->begin(), IE = BB->end();
831 bool Initialized = false;
832 for (Use *I = &II->use_begin().getUse(), *Next; I; I = Next) {
836 Instruction *User = cast<Instruction>(I->getUser());
837 if (User->getParent() == BB) {
840 } else if (PHINode *UserPN = dyn_cast<PHINode>(User)) {
841 if (UserPN->getIncomingBlock(*I) == BB)
845 if (DT->dominates(II, User))
849 Value *Undef = UndefValue::get(II->getType());
850 Updater.Initialize(II->getType(), "");
851 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
852 Updater.AddAvailableValue(BB, II);
855 Updater.RewriteUseAfterInsertions(*I);
861 /// \brief Run the transformation for each region found
862 bool AMDGPUStructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
863 if (R->isTopLevelRegion())
866 Func = R->getEntry()->getParent();
869 DT = &getAnalysis<DominatorTree>();
874 insertConditions(false);
875 insertConditions(true);
893 /// \brief Create the pass
894 Pass *llvm::createAMDGPUStructurizeCFGPass() {
895 return new AMDGPUStructurizeCFG();