1 //=====-- AMDGPUSubtarget.h - Define Subtarget for the AMDIL ---*- C++ -*-====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //==-----------------------------------------------------------------------===//
11 /// \brief AMDGPU specific subclass of TargetSubtarget.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
16 #define LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
18 #include "AMDGPUFrameLowering.h"
19 #include "AMDGPUInstrInfo.h"
20 #include "AMDGPUIntrinsicInfo.h"
21 #include "AMDGPUSubtarget.h"
22 #include "R600ISelLowering.h"
23 #include "llvm/ADT/StringExtras.h"
24 #include "llvm/ADT/StringRef.h"
25 #include "llvm/Target/TargetSubtargetInfo.h"
27 #define GET_SUBTARGETINFO_HEADER
28 #include "AMDGPUGenSubtargetInfo.inc"
32 class SIMachineFunctionInfo;
34 class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
53 short TexVTXClauseSize;
59 bool FlatAddressSpace;
60 bool EnableIRStructurizer;
61 bool EnablePromoteAlloca;
63 bool EnableLoadStoreOpt;
64 unsigned WavefrontSize;
67 bool EnableVGPRSpilling;
69 AMDGPUFrameLowering FrameLowering;
70 std::unique_ptr<AMDGPUTargetLowering> TLInfo;
71 std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
72 InstrItineraryData InstrItins;
76 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS, TargetMachine &TM);
77 AMDGPUSubtarget &initializeSubtargetDependencies(StringRef TT, StringRef GPU,
80 const AMDGPUFrameLowering *getFrameLowering() const override {
81 return &FrameLowering;
83 const AMDGPUInstrInfo *getInstrInfo() const override {
84 return InstrInfo.get();
86 const AMDGPURegisterInfo *getRegisterInfo() const override {
87 return &InstrInfo->getRegisterInfo();
89 AMDGPUTargetLowering *getTargetLowering() const override {
92 const InstrItineraryData *getInstrItineraryData() const override {
96 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
98 bool is64bit() const {
102 bool hasVertexCache() const {
103 return HasVertexCache;
106 short getTexVTXClauseSize() const {
107 return TexVTXClauseSize;
110 Generation getGeneration() const {
114 bool hasHWFP64() const {
118 bool hasCaymanISA() const {
122 bool hasFP32Denormals() const {
123 return FP32Denormals;
126 bool hasFP64Denormals() const {
127 return FP64Denormals;
130 bool hasFlatAddressSpace() const {
131 return FlatAddressSpace;
134 bool hasBFE() const {
135 return (getGeneration() >= EVERGREEN);
138 bool hasBFI() const {
139 return (getGeneration() >= EVERGREEN);
142 bool hasBFM() const {
146 bool hasBCNT(unsigned Size) const {
148 return (getGeneration() >= EVERGREEN);
151 return (getGeneration() >= SOUTHERN_ISLANDS);
156 bool hasMulU24() const {
157 return (getGeneration() >= EVERGREEN);
160 bool hasMulI24() const {
161 return (getGeneration() >= SOUTHERN_ISLANDS ||
165 bool hasFFBL() const {
166 return (getGeneration() >= EVERGREEN);
169 bool hasFFBH() const {
170 return (getGeneration() >= EVERGREEN);
173 bool IsIRStructurizerEnabled() const {
174 return EnableIRStructurizer;
177 bool isPromoteAllocaEnabled() const {
178 return EnablePromoteAlloca;
181 bool isIfCvtEnabled() const {
185 bool loadStoreOptEnabled() const {
186 return EnableLoadStoreOpt;
189 unsigned getWavefrontSize() const {
190 return WavefrontSize;
193 unsigned getStackEntrySize() const;
195 bool hasCFAluBug() const {
196 assert(getGeneration() <= NORTHERN_ISLANDS);
200 int getLocalMemorySize() const {
201 return LocalMemorySize;
204 unsigned getAmdKernelCodeChipID() const;
206 bool enableMachineScheduler() const override {
210 void overrideSchedPolicy(MachineSchedPolicy &Policy,
211 MachineInstr *begin, MachineInstr *end,
212 unsigned NumRegionInstrs) const override;
214 // Helper functions to simplify if statements
215 bool isTargetELF() const {
219 StringRef getDeviceName() const {
223 bool dumpCode() const {
226 bool r600ALUEncoding() const {
229 bool isAmdHsaOS() const {
230 return TargetTriple.getOS() == Triple::AMDHSA;
232 bool isVGPRSpillingEnabled(const SIMachineFunctionInfo *MFI) const;
234 unsigned getMaxWavesPerCU() const {
235 if (getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS)
238 // FIXME: Not sure what this is for other subtagets.
239 llvm_unreachable("do not know max waves per CU for this subtarget.");
243 } // End namespace llvm