1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
13 //===----------------------------------------------------------------------===//
15 #ifndef AMDGPU_TARGET_MACHINE_H
16 #define AMDGPU_TARGET_MACHINE_H
18 #include "AMDGPUFrameLowering.h"
19 #include "AMDGPUInstrInfo.h"
20 #include "AMDGPUSubtarget.h"
21 #include "AMDILIntrinsicInfo.h"
22 #include "R600ISelLowering.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/IR/DataLayout.h"
28 MCAsmInfo* createMCAsmInfo(const Target &T, StringRef TT);
30 class AMDGPUTargetMachine : public LLVMTargetMachine {
32 AMDGPUSubtarget Subtarget;
33 const DataLayout Layout;
34 AMDGPUFrameLowering FrameLowering;
35 AMDGPUIntrinsicInfo IntrinsicInfo;
36 const AMDGPUInstrInfo * InstrInfo;
37 AMDGPUTargetLowering * TLInfo;
38 const InstrItineraryData* InstrItins;
41 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
43 TargetOptions Options,
44 Reloc::Model RM, CodeModel::Model CM,
45 CodeGenOpt::Level OL);
46 ~AMDGPUTargetMachine();
47 virtual const AMDGPUFrameLowering* getFrameLowering() const {
48 return &FrameLowering;
50 virtual const AMDGPUIntrinsicInfo* getIntrinsicInfo() const {
51 return &IntrinsicInfo;
53 virtual const AMDGPUInstrInfo *getInstrInfo() const {return InstrInfo;}
54 virtual const AMDGPUSubtarget *getSubtargetImpl() const {return &Subtarget; }
55 virtual const AMDGPURegisterInfo *getRegisterInfo() const {
56 return &InstrInfo->getRegisterInfo();
58 virtual AMDGPUTargetLowering * getTargetLowering() const {
61 virtual const InstrItineraryData* getInstrItineraryData() const {
64 virtual const DataLayout* getDataLayout() const { return &Layout; }
65 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
68 } // End namespace llvm
70 #endif // AMDGPU_TARGET_MACHINE_H