1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
16 #define LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
18 #include "AMDGPUFrameLowering.h"
19 #include "AMDGPUInstrInfo.h"
20 #include "AMDGPUIntrinsicInfo.h"
21 #include "AMDGPUSubtarget.h"
22 #include "R600ISelLowering.h"
23 #include "llvm/IR/DataLayout.h"
27 //===----------------------------------------------------------------------===//
28 // AMDGPU Target Machine (R600+)
29 //===----------------------------------------------------------------------===//
31 class AMDGPUTargetMachine : public LLVMTargetMachine {
36 TargetLoweringObjectFile *TLOF;
37 AMDGPUSubtarget Subtarget;
38 AMDGPUIntrinsicInfo IntrinsicInfo;
41 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
42 StringRef CPU, TargetOptions Options, Reloc::Model RM,
43 CodeModel::Model CM, CodeGenOpt::Level OL);
44 ~AMDGPUTargetMachine();
45 // FIXME: This is currently broken, the DataLayout needs to move to
46 // the target machine.
47 const DataLayout *getDataLayout() const override {
50 const AMDGPUSubtarget *getSubtargetImpl() const override {
53 const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
54 return &IntrinsicInfo;
56 TargetIRAnalysis getTargetIRAnalysis() override;
58 TargetLoweringObjectFile *getObjFileLowering() const override {
63 //===----------------------------------------------------------------------===//
64 // R600 Target Machine (R600 -> Cayman)
65 //===----------------------------------------------------------------------===//
67 class R600TargetMachine : public AMDGPUTargetMachine {
70 R600TargetMachine(const Target &T, StringRef TT, StringRef FS,
71 StringRef CPU, TargetOptions Options, Reloc::Model RM,
72 CodeModel::Model CM, CodeGenOpt::Level OL);
74 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
77 //===----------------------------------------------------------------------===//
78 // GCN Target Machine (SI+)
79 //===----------------------------------------------------------------------===//
81 class GCNTargetMachine : public AMDGPUTargetMachine {
84 GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
85 StringRef CPU, TargetOptions Options, Reloc::Model RM,
86 CodeModel::Model CM, CodeGenOpt::Level OL);
88 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
91 } // End namespace llvm