1 //===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief The AMDGPU TargetMachine interface definition for hw codgen targets.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
16 #define LLVM_LIB_TARGET_R600_AMDGPUTARGETMACHINE_H
18 #include "AMDGPUFrameLowering.h"
19 #include "AMDGPUInstrInfo.h"
20 #include "AMDGPUIntrinsicInfo.h"
21 #include "AMDGPUSubtarget.h"
22 #include "R600ISelLowering.h"
23 #include "llvm/IR/DataLayout.h"
27 //===----------------------------------------------------------------------===//
28 // AMDGPU Target Machine (R600+)
29 //===----------------------------------------------------------------------===//
31 class AMDGPUTargetMachine : public LLVMTargetMachine {
33 TargetLoweringObjectFile *TLOF;
34 AMDGPUSubtarget Subtarget;
35 AMDGPUIntrinsicInfo IntrinsicInfo;
38 AMDGPUTargetMachine(const Target &T, StringRef TT, StringRef FS,
39 StringRef CPU, TargetOptions Options, Reloc::Model RM,
40 CodeModel::Model CM, CodeGenOpt::Level OL);
41 ~AMDGPUTargetMachine();
42 // FIXME: This is currently broken, the DataLayout needs to move to
43 // the target machine.
44 const DataLayout *getDataLayout() const override {
45 return getSubtargetImpl()->getDataLayout();
47 const AMDGPUSubtarget *getSubtargetImpl() const override {
50 const AMDGPUIntrinsicInfo *getIntrinsicInfo() const override {
51 return &IntrinsicInfo;
53 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
55 /// \brief Register R600 analysis passes with a pass manager.
56 void addAnalysisPasses(PassManagerBase &PM) override;
57 TargetLoweringObjectFile *getObjFileLowering() const override {
62 //===----------------------------------------------------------------------===//
63 // GCN Target Machine (SI+)
64 //===----------------------------------------------------------------------===//
66 class GCNTargetMachine : public AMDGPUTargetMachine {
69 GCNTargetMachine(const Target &T, StringRef TT, StringRef FS,
70 StringRef CPU, TargetOptions Options, Reloc::Model RM,
71 CodeModel::Model CM, CodeGenOpt::Level OL);
74 } // End namespace llvm