1 //===-- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file a TargetTransformInfo::Concept conforming object specific to the
11 /// AMDGPU target machine. It uses the target's detailed information to
12 /// provide more precise answers to certain TTI queries, while letting the
13 /// target independent and default TTI implementations handle the rest.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
18 #define LLVM_LIB_TARGET_R600_AMDGPUTARGETTRANSFORMINFO_H
21 #include "AMDGPUTargetMachine.h"
22 #include "llvm/Analysis/TargetTransformInfo.h"
23 #include "llvm/CodeGen/BasicTTIImpl.h"
24 #include "llvm/Target/TargetLowering.h"
28 class AMDGPUTTIImpl : public BasicTTIImplBase<AMDGPUTTIImpl> {
29 typedef BasicTTIImplBase<AMDGPUTTIImpl> BaseT;
30 typedef TargetTransformInfo TTI;
33 const AMDGPUTargetMachine *TM;
34 const AMDGPUSubtarget *ST;
35 const AMDGPUTargetLowering *TLI;
37 const AMDGPUTargetMachine *getTM() const { return TM; }
38 const AMDGPUTargetLowering *getTLI() const { return TLI; }
41 explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM)
42 : BaseT(TM), TM(TM), ST(TM->getSubtargetImpl()),
43 TLI(ST->getTargetLowering()) {}
45 // Provide value semantics. MSVC requires that we spell all of these out.
46 AMDGPUTTIImpl(const AMDGPUTTIImpl &Arg)
47 : BaseT(static_cast<const BaseT &>(Arg)), TM(Arg.TM), ST(Arg.ST),
49 AMDGPUTTIImpl(AMDGPUTTIImpl &&Arg)
50 : BaseT(std::move(static_cast<BaseT &>(Arg))), TM(std::move(Arg.TM)),
51 ST(std::move(Arg.ST)), TLI(std::move(Arg.TLI)) {}
52 AMDGPUTTIImpl &operator=(const AMDGPUTTIImpl &RHS) {
53 BaseT::operator=(static_cast<const BaseT &>(RHS));
59 AMDGPUTTIImpl &operator=(AMDGPUTTIImpl &&RHS) {
60 BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
61 TM = std::move(RHS.TM);
62 ST = std::move(RHS.ST);
63 TLI = std::move(RHS.TLI);
67 bool hasBranchDivergence() { return true; }
69 void getUnrollingPreferences(const Function *F, Loop *L,
70 TTI::UnrollingPreferences &UP);
72 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) {
73 assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");
74 return ST->hasBCNT(TyWidth) ? TTI::PSK_FastHardware : TTI::PSK_Software;
77 unsigned getNumberOfRegisters(bool Vector);
78 unsigned getRegisterBitWidth(bool Vector);
79 unsigned getMaxInterleaveFactor();
82 } // end namespace llvm