1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
14 add_llvm_target(R600CodeGen
15 AMDILCFGStructurizer.cpp
16 AMDILIntrinsicInfo.cpp
19 AMDGPUFrameLowering.cpp
20 AMDGPUISelDAGToDAG.cpp
22 AMDGPUMachineFunction.cpp
24 AMDGPUTargetMachine.cpp
25 AMDGPUTargetTransformInfo.cpp
26 AMDGPUISelLowering.cpp
27 AMDGPUConvertToISA.cpp
29 AMDGPURegisterInfo.cpp
30 R600ClauseMergePass.cpp
31 R600ControlFlowFinalizer.cpp
32 R600EmitClauseMarkers.cpp
33 R600ExpandSpecialInstrs.cpp
36 R600MachineFunctionInfo.cpp
37 R600MachineScheduler.cpp
38 R600OptimizeVectorRegisters.cpp
41 R600TextureIntrinsicsReplacer.cpp
42 SIAnnotateControlFlow.cpp
47 SILowerControlFlow.cpp
49 SIMachineFunctionInfo.cpp
54 add_subdirectory(InstPrinter)
55 add_subdirectory(TargetInfo)
56 add_subdirectory(MCTargetDesc)