lib/Target/R600/CMakeLists.txt

   1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
   2
   3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
   4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
   5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
   6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
   7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
   8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
   9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
  10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
  11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
  12 add_public_tablegen_target(AMDGPUCommonTableGen)
  13
  14 add_llvm_target(R600CodeGen
  15   AMDILCFGStructurizer.cpp
  16   AMDILIntrinsicInfo.cpp
  17   AMDILISelDAGToDAG.cpp
  18   AMDILISelLowering.cpp
  19   AMDGPUAsmPrinter.cpp
  20   AMDGPUFrameLowering.cpp
  21   AMDGPUIndirectAddressing.cpp
  22   AMDGPUMCInstLower.cpp
  23   AMDGPUMachineFunction.cpp
  24   AMDGPUSubtarget.cpp
  25   AMDGPUTargetMachine.cpp
  26   AMDGPUISelLowering.cpp
  27   AMDGPUConvertToISA.cpp
  28   AMDGPUInstrInfo.cpp
  29   AMDGPURegisterInfo.cpp
  30   R600ControlFlowFinalizer.cpp
  31   R600EmitClauseMarkers.cpp
  32   R600ExpandSpecialInstrs.cpp
  33   R600InstrInfo.cpp
  34   R600ISelLowering.cpp
  35   R600MachineFunctionInfo.cpp
  36   R600MachineScheduler.cpp
  37   R600OptimizeVectorRegisters.cpp
  38   R600Packetizer.cpp
  39   R600RegisterInfo.cpp
  40   R600TextureIntrinsicsReplacer.cpp
  41   SIAnnotateControlFlow.cpp
  42   SIInsertWaits.cpp
  43   SIInstrInfo.cpp
  44   SIISelLowering.cpp
  45   SILowerControlFlow.cpp
  46   SIMachineFunctionInfo.cpp
  47   SIRegisterInfo.cpp
  48   )
  49
  50 add_dependencies(LLVMR600CodeGen intrinsics_gen)
  51
  52 add_subdirectory(InstPrinter)
  53 add_subdirectory(TargetInfo)
  54 add_subdirectory(MCTargetDesc)