1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
14 add_llvm_target(R600CodeGen
16 AMDILCFGStructurizer.cpp
19 AMDILEvergreenDevice.cpp
20 AMDILFrameLowering.cpp
21 AMDILIntrinsicInfo.cpp
25 AMDILPeepholeOptimizer.cpp
30 AMDGPUStructurizeCFG.cpp
31 AMDGPUTargetMachine.cpp
32 AMDGPUISelLowering.cpp
33 AMDGPUConvertToISA.cpp
35 AMDGPURegisterInfo.cpp
36 R600ExpandSpecialInstrs.cpp
39 R600LowerConstCopy.cpp
40 R600MachineFunctionInfo.cpp
42 SIAnnotateControlFlow.cpp
43 SIAssignInterpRegs.cpp
47 SILowerLiteralConstants.cpp
48 SILowerControlFlow.cpp
49 SIMachineFunctionInfo.cpp
53 add_dependencies(LLVMR600CodeGen intrinsics_gen)
55 add_subdirectory(InstPrinter)
56 add_subdirectory(TargetInfo)
57 add_subdirectory(MCTargetDesc)