1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
14 add_llvm_target(R600CodeGen
15 AMDILCFGStructurizer.cpp
17 AMDGPUFrameLowering.cpp
18 AMDGPUIntrinsicInfo.cpp
19 AMDGPUISelDAGToDAG.cpp
21 AMDGPUMachineFunction.cpp
23 AMDGPUTargetMachine.cpp
24 AMDGPUTargetTransformInfo.cpp
25 AMDGPUISelLowering.cpp
27 AMDGPUPromoteAlloca.cpp
28 AMDGPURegisterInfo.cpp
29 R600ClauseMergePass.cpp
30 R600ControlFlowFinalizer.cpp
31 R600EmitClauseMarkers.cpp
32 R600ExpandSpecialInstrs.cpp
35 R600MachineFunctionInfo.cpp
36 R600MachineScheduler.cpp
37 R600OptimizeVectorRegisters.cpp
40 R600TextureIntrinsicsReplacer.cpp
41 SIAnnotateControlFlow.cpp
43 SIFixSGPRLiveRanges.cpp
47 SILowerControlFlow.cpp
49 SIMachineFunctionInfo.cpp
51 SIShrinkInstructions.cpp
55 add_subdirectory(InstPrinter)
56 add_subdirectory(TargetInfo)
57 add_subdirectory(MCTargetDesc)