Add ARM cortex-r5 subtarget.
[oota-llvm.git] / lib / Target / R600 / CMakeLists.txt
1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
2
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
13
14 add_llvm_target(R600CodeGen
15   AMDIL7XXDevice.cpp
16   AMDILCFGStructurizer.cpp
17   AMDILDevice.cpp
18   AMDILDeviceInfo.cpp
19   AMDILEvergreenDevice.cpp
20   AMDILFrameLowering.cpp
21   AMDILIntrinsicInfo.cpp
22   AMDILISelDAGToDAG.cpp
23   AMDILISelLowering.cpp
24   AMDILNIDevice.cpp
25   AMDILPeepholeOptimizer.cpp
26   AMDILSIDevice.cpp
27   AMDGPUAsmPrinter.cpp
28   AMDGPUMCInstLower.cpp
29   AMDGPUSubtarget.cpp
30   AMDGPUStructurizeCFG.cpp
31   AMDGPUTargetMachine.cpp
32   AMDGPUISelLowering.cpp
33   AMDGPUConvertToISA.cpp
34   AMDGPUInstrInfo.cpp
35   AMDGPURegisterInfo.cpp
36   R600ExpandSpecialInstrs.cpp
37   R600InstrInfo.cpp
38   R600ISelLowering.cpp
39   R600MachineFunctionInfo.cpp
40   R600RegisterInfo.cpp
41   SIAnnotateControlFlow.cpp
42   SIAssignInterpRegs.cpp
43   SIInstrInfo.cpp
44   SIISelLowering.cpp
45   SILowerLiteralConstants.cpp
46   SILowerControlFlow.cpp
47   SIMachineFunctionInfo.cpp
48   SIRegisterInfo.cpp
49   )
50
51 add_dependencies(LLVMR600CodeGen intrinsics_gen)
52
53 add_subdirectory(InstPrinter)
54 add_subdirectory(TargetInfo)
55 add_subdirectory(MCTargetDesc)