1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
14 add_llvm_target(R600CodeGen
15 AMDILCFGStructurizer.cpp
16 AMDILIntrinsicInfo.cpp
19 AMDGPUFrameLowering.cpp
20 AMDGPUIndirectAddressing.cpp
21 AMDGPUISelDAGToDAG.cpp
23 AMDGPUMachineFunction.cpp
25 AMDGPUTargetMachine.cpp
26 AMDGPUTargetTransformInfo.cpp
27 AMDGPUISelLowering.cpp
28 AMDGPUConvertToISA.cpp
30 AMDGPURegisterInfo.cpp
31 R600ControlFlowFinalizer.cpp
32 R600EmitClauseMarkers.cpp
33 R600ExpandSpecialInstrs.cpp
36 R600MachineFunctionInfo.cpp
37 R600MachineScheduler.cpp
38 R600OptimizeVectorRegisters.cpp
41 R600TextureIntrinsicsReplacer.cpp
42 SIAnnotateControlFlow.cpp
46 SILowerControlFlow.cpp
47 SIMachineFunctionInfo.cpp
51 add_dependencies(LLVMR600CodeGen AMDGPUCommonTableGen intrinsics_gen)
53 add_subdirectory(InstPrinter)
54 add_subdirectory(TargetInfo)
55 add_subdirectory(MCTargetDesc)