1 //===-- AMDGPUAsmBackend.cpp - AMDGPU Assembler Backend -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
12 #include "llvm/ADT/StringRef.h"
13 #include "llvm/MC/MCAsmBackend.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCObjectWriter.h"
16 #include "llvm/MC/MCValue.h"
17 #include "llvm/Support/TargetRegistry.h"
23 class AMDGPUMCObjectWriter : public MCObjectWriter {
25 AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { }
26 virtual void ExecutePostLayoutBinding(MCAssembler &Asm,
27 const MCAsmLayout &Layout) {
28 //XXX: Implement if necessary.
30 virtual void RecordRelocation(const MCAssembler &Asm,
31 const MCAsmLayout &Layout,
32 const MCFragment *Fragment,
34 MCValue Target, uint64_t &FixedValue) {
35 assert(!"Not implemented");
38 virtual void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout);
42 class AMDGPUAsmBackend : public MCAsmBackend {
44 AMDGPUAsmBackend(const Target &T)
47 virtual unsigned getNumFixupKinds() const { return 0; };
48 virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
49 uint64_t Value) const;
50 virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
51 const MCRelaxableFragment *DF,
52 const MCAsmLayout &Layout) const {
55 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
56 assert(!"Not implemented");
58 virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
59 virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
64 } //End anonymous namespace
66 void AMDGPUMCObjectWriter::WriteObject(MCAssembler &Asm,
67 const MCAsmLayout &Layout) {
68 for (MCAssembler::iterator I = Asm.begin(), E = Asm.end(); I != E; ++I) {
69 Asm.writeSectionData(I, Layout);
73 void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
74 unsigned DataSize, uint64_t Value) const {
76 uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset());
77 assert(Fixup.getKind() == FK_PCRel_4);
78 *Dst = (Value - 4) / 4;
81 //===----------------------------------------------------------------------===//
82 // ELFAMDGPUAsmBackend class
83 //===----------------------------------------------------------------------===//
87 class ELFAMDGPUAsmBackend : public AMDGPUAsmBackend {
89 ELFAMDGPUAsmBackend(const Target &T) : AMDGPUAsmBackend(T) { }
91 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
92 return createAMDGPUELFObjectWriter(OS);
96 } // end anonymous namespace
98 MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T,
99 const MCRegisterInfo &MRI,
102 return new ELFAMDGPUAsmBackend(T);