1 //===-- R600RegisterInfo.h - R600 Register Info Interface ------*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief Interface definition for R600RegisterInfo
13 //===----------------------------------------------------------------------===//
15 #ifndef R600REGISTERINFO_H_
16 #define R600REGISTERINFO_H_
18 #include "AMDGPURegisterInfo.h"
19 #include "AMDGPUTargetMachine.h"
23 class R600TargetMachine;
25 struct R600RegisterInfo : public AMDGPURegisterInfo {
26 AMDGPUTargetMachine &TM;
29 R600RegisterInfo(AMDGPUTargetMachine &tm);
31 BitVector getReservedRegs(const MachineFunction &MF) const override;
33 /// \param RC is an AMDIL reg class.
35 /// \returns the R600 reg class that is equivalent to \p RC.
36 const TargetRegisterClass *getISARegClass(
37 const TargetRegisterClass *RC) const override;
39 /// \brief get the HW encoding for a register's channel.
40 unsigned getHWRegChan(unsigned reg) const;
42 unsigned getHWRegIndex(unsigned Reg) const override;
44 /// \brief get the register class of the specified type to use in the
46 const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const override;
48 const RegClassWeight &
49 getRegClassWeight(const TargetRegisterClass *RC) const override;
51 // \returns true if \p Reg can be defined in one ALU caluse and used in another.
52 bool isPhysRegLiveAcrossClauses(unsigned Reg) const;
55 } // End namespace llvm
57 #endif // AMDIDSAREGISTERINFO_H_