1 //===-- SIISelLowering.h - SI DAG Lowering Interface ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief SI DAG Lowering interface definition
13 //===----------------------------------------------------------------------===//
15 #ifndef SIISELLOWERING_H
16 #define SIISELLOWERING_H
18 #include "AMDGPUISelLowering.h"
19 #include "SIInstrInfo.h"
23 class SITargetLowering : public AMDGPUTargetLowering {
24 const SIInstrInfo * TII;
25 const TargetRegisterInfo * TRI;
27 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
30 bool foldImm(SDValue &Operand, int32_t &Immediate,
31 bool &ScalarSlotUsed) const;
32 bool fitsRegClass(SelectionDAG &DAG, SDValue &Op, unsigned RegClass) const;
33 void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
34 unsigned RegClass, bool &ScalarSlotUsed) const;
37 SITargetLowering(TargetMachine &tm);
39 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
41 const SmallVectorImpl<ISD::InputArg> &Ins,
42 DebugLoc DL, SelectionDAG &DAG,
43 SmallVectorImpl<SDValue> &InVals) const;
45 virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr * MI,
46 MachineBasicBlock * BB) const;
47 virtual EVT getSetCCResultType(EVT VT) const;
48 virtual MVT getScalarShiftAmountTy(EVT VT) const;
49 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
50 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
51 virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const;
53 int32_t analyzeImmediate(const SDNode *N) const;
56 } // End namespace llvm
58 #endif //SIISELLOWERING_H