1 //===-- SIISelLowering.h - SI DAG Lowering Interface ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief SI DAG Lowering interface definition
13 //===----------------------------------------------------------------------===//
15 #ifndef SIISELLOWERING_H
16 #define SIISELLOWERING_H
18 #include "AMDGPUISelLowering.h"
19 #include "SIInstrInfo.h"
23 class SITargetLowering : public AMDGPUTargetLowering {
24 const SIInstrInfo * TII;
26 /// Memory reads and writes are syncronized using the S_WAITCNT instruction.
27 /// This function takes the most conservative approach and inserts an
28 /// S_WAITCNT instruction after every read and write.
29 void AppendS_WAITCNT(MachineInstr *MI, MachineBasicBlock &BB,
30 MachineBasicBlock::iterator I) const;
31 void LowerMOV_IMM(MachineInstr *MI, MachineBasicBlock &BB,
32 MachineBasicBlock::iterator I, unsigned Opocde) const;
33 void LowerSI_INTERP(MachineInstr *MI, MachineBasicBlock &BB,
34 MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
35 void LowerSI_INTERP_CONST(MachineInstr *MI, MachineBasicBlock &BB,
36 MachineBasicBlock::iterator I, MachineRegisterInfo &MRI) const;
37 void LowerSI_KIL(MachineInstr *MI, MachineBasicBlock &BB,
38 MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
39 void LowerSI_WQM(MachineInstr *MI, MachineBasicBlock &BB,
40 MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
41 void LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB,
42 MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const;
44 SDValue Loweri1ContextSwitch(SDValue Op, SelectionDAG &DAG,
45 unsigned VCCNode) const;
46 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
48 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
51 SITargetLowering(TargetMachine &tm);
52 virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr * MI,
53 MachineBasicBlock * BB) const;
54 virtual EVT getSetCCResultType(EVT VT) const;
55 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
56 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
57 virtual const char* getTargetNodeName(unsigned Opcode) const;
60 } // End namespace llvm
62 #endif //SIISELLOWERING_H