1 //===-- SIMachineFunctionInfo.cpp - SI Machine Function Info -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
12 #include "SIMachineFunctionInfo.h"
13 #include "SIInstrInfo.h"
14 #include "SIRegisterInfo.h"
15 #include "llvm/CodeGen/MachineFrameInfo.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/IR/Function.h"
18 #include "llvm/IR/LLVMContext.h"
25 // Pin the vtable to this file.
26 void SIMachineFunctionInfo::anchor() {}
28 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
29 : AMDGPUMachineFunction(MF),
33 /// \brief Returns a register that is not used at any point in the function.
34 /// If all registers are used, then this function will return
35 // AMDGPU::NoRegister.
36 static unsigned findUnusedVGPR(const MachineRegisterInfo &MRI) {
38 const TargetRegisterClass *RC = &AMDGPU::VGPR_32RegClass;
40 for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
42 if (!MRI.isPhysRegUsed(*I))
45 return AMDGPU::NoRegister;
48 SIMachineFunctionInfo::SpilledReg SIMachineFunctionInfo::getSpilledReg(
52 const MachineFrameInfo *FrameInfo = MF->getFrameInfo();
53 MachineRegisterInfo &MRI = MF->getRegInfo();
54 int64_t Offset = FrameInfo->getObjectOffset(FrameIndex);
57 unsigned LaneVGPRIdx = Offset / (64 * 4);
58 unsigned Lane = (Offset / 4) % 64;
60 struct SpilledReg Spill;
62 if (!LaneVGPRs.count(LaneVGPRIdx)) {
63 unsigned LaneVGPR = findUnusedVGPR(MRI);
64 LaneVGPRs[LaneVGPRIdx] = LaneVGPR;
65 MRI.setPhysRegUsed(LaneVGPR);
67 // Add this register as live-in to all blocks to avoid machine verifer
68 // complaining about use of an undefined physical register.
69 for (MachineFunction::iterator BI = MF->begin(), BE = MF->end();
71 BI->addLiveIn(LaneVGPR);
75 Spill.VGPR = LaneVGPRs[LaneVGPRIdx];