1 //===-- SIRegisterInfo.cpp - SI Register Information ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief SI implementation of the TargetRegisterInfo class.
13 //===----------------------------------------------------------------------===//
16 #include "SIRegisterInfo.h"
17 #include "AMDGPUTargetMachine.h"
21 SIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm,
22 const TargetInstrInfo &tii)
23 : AMDGPURegisterInfo(tm, tii),
28 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
29 BitVector Reserved(getNumRegs());
33 unsigned SIRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC,
34 MachineFunction &MF) const {
35 return RC->getNumRegs();
38 const TargetRegisterClass *
39 SIRegisterInfo::getISARegClass(const TargetRegisterClass * rc) const {
40 switch (rc->getID()) {
41 case AMDGPU::GPRF32RegClassID:
42 return &AMDGPU::VReg_32RegClass;
47 const TargetRegisterClass * SIRegisterInfo::getCFGStructurizerRegClass(
51 case MVT::i32: return &AMDGPU::VReg_32RegClass;