1 //===-- VIInstructions.td - VI Instruction Defintions ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
9 // Instruction definitions for VI and newer.
10 //===----------------------------------------------------------------------===//
12 let SubtargetPredicate = isVI in {
14 defm BUFFER_LOAD_DWORD_VI : MUBUF_Load_Helper_vi <
15 0x14, "buffer_load_dword", VGPR_32, i32, global_load
18 defm BUFFER_LOAD_FORMAT_XYZW_VI : MUBUF_Load_Helper_vi <
19 0x03, "buffer_load_format_xyzw", VReg_128
22 } // End SubtargetPredicate = isVI
25 //===----------------------------------------------------------------------===//
27 //===----------------------------------------------------------------------===//
29 let Predicates = [isVI] in {
31 // 1. Offset as 8bit DWORD immediate
33 (SIload_constant v4i32:$sbase, IMM20bit:$offset),
34 (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset))
37 //===----------------------------------------------------------------------===//
39 //===----------------------------------------------------------------------===//
41 // Offset in an 32Bit VGPR
43 (SIload_constant v4i32:$sbase, i32:$voff),
44 (BUFFER_LOAD_DWORD_VI_OFFEN $sbase, $voff, 0, 0, 0, 0, 0)
47 // Offset in an 32Bit VGPR
49 (SIload_constant v4i32:$sbase, i32:$voff),
50 (BUFFER_LOAD_DWORD_VI_OFFEN $sbase, $voff, 0, 0, 0, 0, 0)
53 /* int_SI_vs_load_input */
55 (SIload_input v4i32:$tlst, imm:$attr_offset, i32:$buf_idx_vgpr),
56 (BUFFER_LOAD_FORMAT_XYZW_VI_IDXEN $tlst, $buf_idx_vgpr, imm:$attr_offset, 0, 0, 0, 0)
59 defm : MUBUF_Load_Dword <i32, BUFFER_LOAD_DWORD_VI_OFFSET,
60 BUFFER_LOAD_DWORD_VI_OFFEN,
61 BUFFER_LOAD_DWORD_VI_IDXEN,
62 BUFFER_LOAD_DWORD_VI_BOTHEN>;
64 } // End Predicates = [isVI]