1 Target Independent Opportunities:
3 //===---------------------------------------------------------------------===//
5 With the recent changes to make the implicit def/use set explicit in
6 machineinstrs, we should change the target descriptions for 'call' instructions
7 so that the .td files don't list all the call-clobbered registers as implicit
8 defs. Instead, these should be added by the code generator (e.g. on the dag).
10 This has a number of uses:
12 1. PPC32/64 and X86 32/64 can avoid having multiple copies of call instructions
13 for their different impdef sets.
14 2. Targets with multiple calling convs (e.g. x86) which have different clobber
15 sets don't need copies of call instructions.
16 3. 'Interprocedural register allocation' can be done to reduce the clobber sets
19 //===---------------------------------------------------------------------===//
21 We should recognized various "overflow detection" idioms and translate them into
22 llvm.uadd.with.overflow and similar intrinsics. Here is a multiply idiom:
24 unsigned int mul(unsigned int a,unsigned int b) {
25 if ((unsigned long long)a*b>0xffffffff)
30 The legalization code for mul-with-overflow needs to be made more robust before
31 this can be implemented though.
33 //===---------------------------------------------------------------------===//
35 Get the C front-end to expand hypot(x,y) -> llvm.sqrt(x*x+y*y) when errno and
36 precision don't matter (ffastmath). Misc/mandel will like this. :) This isn't
37 safe in general, even on darwin. See the libm implementation of hypot for
38 examples (which special case when x/y are exactly zero to get signed zeros etc
41 //===---------------------------------------------------------------------===//
43 On targets with expensive 64-bit multiply, we could LSR this:
50 for (i = ...; ++i, tmp+=tmp)
53 This would be a win on ppc32, but not x86 or ppc64.
55 //===---------------------------------------------------------------------===//
57 Shrink: (setlt (loadi32 P), 0) -> (setlt (loadi8 Phi), 0)
59 //===---------------------------------------------------------------------===//
61 Reassociate should turn things like:
63 int factorial(int X) {
64 return X*X*X*X*X*X*X*X;
67 into llvm.powi calls, allowing the code generator to produce balanced
70 First, the intrinsic needs to be extended to support integers, and second the
71 code generator needs to be enhanced to lower these to multiplication trees.
73 //===---------------------------------------------------------------------===//
75 Interesting? testcase for add/shift/mul reassoc:
77 int bar(int x, int y) {
78 return x*x*x+y+x*x*x*x*x*y*y*y*y;
80 int foo(int z, int n) {
81 return bar(z, n) + bar(2*z, 2*n);
84 This is blocked on not handling X*X*X -> powi(X, 3) (see note above). The issue
85 is that we end up getting t = 2*X s = t*t and don't turn this into 4*X*X,
86 which is the same number of multiplies and is canonical, because the 2*X has
87 multiple uses. Here's a simple example:
89 define i32 @test15(i32 %X1) {
90 %B = mul i32 %X1, 47 ; X1*47
96 //===---------------------------------------------------------------------===//
98 Reassociate should handle the example in GCC PR16157:
100 extern int a0, a1, a2, a3, a4; extern int b0, b1, b2, b3, b4;
101 void f () { /* this can be optimized to four additions... */
102 b4 = a4 + a3 + a2 + a1 + a0;
103 b3 = a3 + a2 + a1 + a0;
108 This requires reassociating to forms of expressions that are already available,
109 something that reassoc doesn't think about yet.
112 //===---------------------------------------------------------------------===//
114 This function: (derived from GCC PR19988)
115 double foo(double x, double y) {
116 return ((x + 0.1234 * y) * (x + -0.1234 * y));
122 mulsd LCPI1_1(%rip), %xmm1
123 mulsd LCPI1_0(%rip), %xmm2
130 Reassociate should be able to turn it into:
132 double foo(double x, double y) {
133 return ((x + 0.1234 * y) * (x - 0.1234 * y));
136 Which allows the multiply by constant to be CSE'd, producing:
139 mulsd LCPI1_0(%rip), %xmm1
146 This doesn't need -ffast-math support at all. This is particularly bad because
147 the llvm-gcc frontend is canonicalizing the later into the former, but clang
148 doesn't have this problem.
150 //===---------------------------------------------------------------------===//
152 These two functions should generate the same code on big-endian systems:
154 int g(int *j,int *l) { return memcmp(j,l,4); }
155 int h(int *j, int *l) { return *j - *l; }
157 this could be done in SelectionDAGISel.cpp, along with other special cases,
160 //===---------------------------------------------------------------------===//
162 It would be nice to revert this patch:
163 http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20060213/031986.html
165 And teach the dag combiner enough to simplify the code expanded before
166 legalize. It seems plausible that this knowledge would let it simplify other
169 //===---------------------------------------------------------------------===//
171 For vector types, TargetData.cpp::getTypeInfo() returns alignment that is equal
172 to the type size. It works but can be overly conservative as the alignment of
173 specific vector types are target dependent.
175 //===---------------------------------------------------------------------===//
177 We should produce an unaligned load from code like this:
179 v4sf example(float *P) {
180 return (v4sf){P[0], P[1], P[2], P[3] };
183 //===---------------------------------------------------------------------===//
185 Add support for conditional increments, and other related patterns. Instead
190 je LBB16_2 #cond_next
201 //===---------------------------------------------------------------------===//
203 Combine: a = sin(x), b = cos(x) into a,b = sincos(x).
205 Expand these to calls of sin/cos and stores:
206 double sincos(double x, double *sin, double *cos);
207 float sincosf(float x, float *sin, float *cos);
208 long double sincosl(long double x, long double *sin, long double *cos);
210 Doing so could allow SROA of the destination pointers. See also:
211 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17687
213 This is now easily doable with MRVs. We could even make an intrinsic for this
214 if anyone cared enough about sincos.
216 //===---------------------------------------------------------------------===//
218 quantum_sigma_x in 462.libquantum contains the following loop:
220 for(i=0; i<reg->size; i++)
222 /* Flip the target bit of each basis state */
223 reg->node[i].state ^= ((MAX_UNSIGNED) 1 << target);
226 Where MAX_UNSIGNED/state is a 64-bit int. On a 32-bit platform it would be just
227 so cool to turn it into something like:
229 long long Res = ((MAX_UNSIGNED) 1 << target);
231 for(i=0; i<reg->size; i++)
232 reg->node[i].state ^= Res & 0xFFFFFFFFULL;
234 for(i=0; i<reg->size; i++)
235 reg->node[i].state ^= Res & 0xFFFFFFFF00000000ULL
238 ... which would only do one 32-bit XOR per loop iteration instead of two.
240 It would also be nice to recognize the reg->size doesn't alias reg->node[i], but
243 //===---------------------------------------------------------------------===//
245 This isn't recognized as bswap by instcombine (yes, it really is bswap):
247 unsigned long reverse(unsigned v) {
249 t = v ^ ((v << 16) | (v >> 16));
251 v = (v << 24) | (v >> 8);
255 //===---------------------------------------------------------------------===//
259 These idioms should be recognized as popcount (see PR1488):
261 unsigned countbits_slow(unsigned v) {
263 for (c = 0; v; v >>= 1)
267 unsigned countbits_fast(unsigned v){
270 v &= v - 1; // clear the least significant bit set
274 BITBOARD = unsigned long long
275 int PopCnt(register BITBOARD a) {
283 unsigned int popcount(unsigned int input) {
284 unsigned int count = 0;
285 for (unsigned int i = 0; i < 4 * 8; i++)
286 count += (input >> i) & i;
290 This sort of thing should be added to the loop idiom pass.
292 //===---------------------------------------------------------------------===//
294 These should turn into single 16-bit (unaligned?) loads on little/big endian
297 unsigned short read_16_le(const unsigned char *adr) {
298 return adr[0] | (adr[1] << 8);
300 unsigned short read_16_be(const unsigned char *adr) {
301 return (adr[0] << 8) | adr[1];
304 //===---------------------------------------------------------------------===//
306 -instcombine should handle this transform:
307 icmp pred (sdiv X / C1 ), C2
308 when X, C1, and C2 are unsigned. Similarly for udiv and signed operands.
310 Currently InstCombine avoids this transform but will do it when the signs of
311 the operands and the sign of the divide match. See the FIXME in
312 InstructionCombining.cpp in the visitSetCondInst method after the switch case
313 for Instruction::UDiv (around line 4447) for more details.
315 The SingleSource/Benchmarks/Shootout-C++/hash and hash2 tests have examples of
318 //===---------------------------------------------------------------------===//
322 SingleSource/Benchmarks/Misc/dt.c shows several interesting optimization
323 opportunities in its double_array_divs_variable function: it needs loop
324 interchange, memory promotion (which LICM already does), vectorization and
325 variable trip count loop unrolling (since it has a constant trip count). ICC
326 apparently produces this very nice code with -ffast-math:
328 ..B1.70: # Preds ..B1.70 ..B1.69
329 mulpd %xmm0, %xmm1 #108.2
330 mulpd %xmm0, %xmm1 #108.2
331 mulpd %xmm0, %xmm1 #108.2
332 mulpd %xmm0, %xmm1 #108.2
334 cmpl $131072, %edx #108.2
335 jb ..B1.70 # Prob 99% #108.2
337 It would be better to count down to zero, but this is a lot better than what we
340 //===---------------------------------------------------------------------===//
344 typedef unsigned U32;
345 typedef unsigned long long U64;
346 int test (U32 *inst, U64 *regs) {
349 int r1 = (temp >> 20) & 0xf;
350 int b2 = (temp >> 16) & 0xf;
351 effective_addr2 = temp & 0xfff;
352 if (b2) effective_addr2 += regs[b2];
353 b2 = (temp >> 12) & 0xf;
354 if (b2) effective_addr2 += regs[b2];
355 effective_addr2 &= regs[4];
356 if ((effective_addr2 & 3) == 0)
361 Note that only the low 2 bits of effective_addr2 are used. On 32-bit systems,
362 we don't eliminate the computation of the top half of effective_addr2 because
363 we don't have whole-function selection dags. On x86, this means we use one
364 extra register for the function when effective_addr2 is declared as U64 than
365 when it is declared U32.
367 PHI Slicing could be extended to do this.
369 //===---------------------------------------------------------------------===//
371 LSR should know what GPR types a target has from TargetData. This code:
373 volatile short X, Y; // globals
377 for (i = 0; i < N; i++) { X = i; Y = i*4; }
380 produces two near identical IV's (after promotion) on PPC/ARM:
390 add r2, r2, #1 <- [0,+,1]
391 sub r0, r0, #1 <- [0,-,1]
395 LSR should reuse the "+" IV for the exit test.
397 //===---------------------------------------------------------------------===//
399 Tail call elim should be more aggressive, checking to see if the call is
400 followed by an uncond branch to an exit block.
402 ; This testcase is due to tail-duplication not wanting to copy the return
403 ; instruction into the terminating blocks because there was other code
404 ; optimized out of the function after the taildup happened.
405 ; RUN: llvm-as < %s | opt -tailcallelim | llvm-dis | not grep call
407 define i32 @t4(i32 %a) {
409 %tmp.1 = and i32 %a, 1 ; <i32> [#uses=1]
410 %tmp.2 = icmp ne i32 %tmp.1, 0 ; <i1> [#uses=1]
411 br i1 %tmp.2, label %then.0, label %else.0
413 then.0: ; preds = %entry
414 %tmp.5 = add i32 %a, -1 ; <i32> [#uses=1]
415 %tmp.3 = call i32 @t4( i32 %tmp.5 ) ; <i32> [#uses=1]
418 else.0: ; preds = %entry
419 %tmp.7 = icmp ne i32 %a, 0 ; <i1> [#uses=1]
420 br i1 %tmp.7, label %then.1, label %return
422 then.1: ; preds = %else.0
423 %tmp.11 = add i32 %a, -2 ; <i32> [#uses=1]
424 %tmp.9 = call i32 @t4( i32 %tmp.11 ) ; <i32> [#uses=1]
427 return: ; preds = %then.1, %else.0, %then.0
428 %result.0 = phi i32 [ 0, %else.0 ], [ %tmp.3, %then.0 ],
433 //===---------------------------------------------------------------------===//
435 Tail recursion elimination should handle:
440 return 2 * pow2m1 (n - 1) + 1;
443 Also, multiplies can be turned into SHL's, so they should be handled as if
444 they were associative. "return foo() << 1" can be tail recursion eliminated.
446 //===---------------------------------------------------------------------===//
448 Argument promotion should promote arguments for recursive functions, like
451 ; RUN: llvm-as < %s | opt -argpromotion | llvm-dis | grep x.val
453 define internal i32 @foo(i32* %x) {
455 %tmp = load i32* %x ; <i32> [#uses=0]
456 %tmp.foo = call i32 @foo( i32* %x ) ; <i32> [#uses=1]
460 define i32 @bar(i32* %x) {
462 %tmp3 = call i32 @foo( i32* %x ) ; <i32> [#uses=1]
466 //===---------------------------------------------------------------------===//
468 We should investigate an instruction sinking pass. Consider this silly
484 je LBB1_2 # cond_true
492 The PIC base computation (call+popl) is only used on one path through the
493 code, but is currently always computed in the entry block. It would be
494 better to sink the picbase computation down into the block for the
495 assertion, as it is the only one that uses it. This happens for a lot of
496 code with early outs.
498 Another example is loads of arguments, which are usually emitted into the
499 entry block on targets like x86. If not used in all paths through a
500 function, they should be sunk into the ones that do.
502 In this case, whole-function-isel would also handle this.
504 //===---------------------------------------------------------------------===//
506 Investigate lowering of sparse switch statements into perfect hash tables:
507 http://burtleburtle.net/bob/hash/perfect.html
509 //===---------------------------------------------------------------------===//
511 We should turn things like "load+fabs+store" and "load+fneg+store" into the
512 corresponding integer operations. On a yonah, this loop:
517 for (b = 0; b < 10000000; b++)
518 for (i = 0; i < 256; i++)
522 is twice as slow as this loop:
527 for (b = 0; b < 10000000; b++)
528 for (i = 0; i < 256; i++)
529 a[i] ^= (1ULL << 63);
532 and I suspect other processors are similar. On X86 in particular this is a
533 big win because doing this with integers allows the use of read/modify/write
536 //===---------------------------------------------------------------------===//
538 DAG Combiner should try to combine small loads into larger loads when
539 profitable. For example, we compile this C++ example:
541 struct THotKey { short Key; bool Control; bool Shift; bool Alt; };
542 extern THotKey m_HotKey;
543 THotKey GetHotKey () { return m_HotKey; }
545 into (-m64 -O3 -fno-exceptions -static -fomit-frame-pointer):
547 __Z9GetHotKeyv: ## @_Z9GetHotKeyv
548 movq _m_HotKey@GOTPCREL(%rip), %rax
561 //===---------------------------------------------------------------------===//
563 We should add an FRINT node to the DAG to model targets that have legal
564 implementations of ceil/floor/rint.
566 //===---------------------------------------------------------------------===//
571 long long input[8] = {1,0,1,0,1,0,1,0};
575 Clang compiles this into:
577 call void @llvm.memset.p0i8.i64(i8* %tmp, i8 0, i64 64, i32 16, i1 false)
578 %0 = getelementptr [8 x i64]* %input, i64 0, i64 0
579 store i64 1, i64* %0, align 16
580 %1 = getelementptr [8 x i64]* %input, i64 0, i64 2
581 store i64 1, i64* %1, align 16
582 %2 = getelementptr [8 x i64]* %input, i64 0, i64 4
583 store i64 1, i64* %2, align 16
584 %3 = getelementptr [8 x i64]* %input, i64 0, i64 6
585 store i64 1, i64* %3, align 16
587 Which gets codegen'd into:
590 movaps %xmm0, -16(%rbp)
591 movaps %xmm0, -32(%rbp)
592 movaps %xmm0, -48(%rbp)
593 movaps %xmm0, -64(%rbp)
599 It would be better to have 4 movq's of 0 instead of the movaps's.
601 //===---------------------------------------------------------------------===//
603 http://llvm.org/PR717:
605 The following code should compile into "ret int undef". Instead, LLVM
606 produces "ret int 0":
615 //===---------------------------------------------------------------------===//
617 The loop unroller should partially unroll loops (instead of peeling them)
618 when code growth isn't too bad and when an unroll count allows simplification
619 of some code within the loop. One trivial example is:
625 for ( nLoop = 0; nLoop < 1000; nLoop++ ) {
634 Unrolling by 2 would eliminate the '&1' in both copies, leading to a net
635 reduction in code size. The resultant code would then also be suitable for
636 exit value computation.
638 //===---------------------------------------------------------------------===//
640 We miss a bunch of rotate opportunities on various targets, including ppc, x86,
641 etc. On X86, we miss a bunch of 'rotate by variable' cases because the rotate
642 matching code in dag combine doesn't look through truncates aggressively
643 enough. Here are some testcases reduces from GCC PR17886:
645 unsigned long long f5(unsigned long long x, unsigned long long y) {
646 return (x << 8) | ((y >> 48) & 0xffull);
648 unsigned long long f6(unsigned long long x, unsigned long long y, int z) {
651 return (x << 8) | ((y >> 48) & 0xffull);
653 return (x << 16) | ((y >> 40) & 0xffffull);
655 return (x << 24) | ((y >> 32) & 0xffffffull);
657 return (x << 32) | ((y >> 24) & 0xffffffffull);
659 return (x << 40) | ((y >> 16) & 0xffffffffffull);
663 //===---------------------------------------------------------------------===//
665 This (and similar related idioms):
667 unsigned int foo(unsigned char i) {
668 return i | (i<<8) | (i<<16) | (i<<24);
673 define i32 @foo(i8 zeroext %i) nounwind readnone ssp noredzone {
675 %conv = zext i8 %i to i32
676 %shl = shl i32 %conv, 8
677 %shl5 = shl i32 %conv, 16
678 %shl9 = shl i32 %conv, 24
679 %or = or i32 %shl9, %conv
680 %or6 = or i32 %or, %shl5
681 %or10 = or i32 %or6, %shl
685 it would be better as:
687 unsigned int bar(unsigned char i) {
688 unsigned int j=i | (i << 8);
694 define i32 @bar(i8 zeroext %i) nounwind readnone ssp noredzone {
696 %conv = zext i8 %i to i32
697 %shl = shl i32 %conv, 8
698 %or = or i32 %shl, %conv
699 %shl5 = shl i32 %or, 16
700 %or6 = or i32 %shl5, %or
704 or even i*0x01010101, depending on the speed of the multiplier. The best way to
705 handle this is to canonicalize it to a multiply in IR and have codegen handle
706 lowering multiplies to shifts on cpus where shifts are faster.
708 //===---------------------------------------------------------------------===//
710 We do a number of simplifications in simplify libcalls to strength reduce
711 standard library functions, but we don't currently merge them together. For
712 example, it is useful to merge memcpy(a,b,strlen(b)) -> strcpy. This can only
713 be done safely if "b" isn't modified between the strlen and memcpy of course.
715 //===---------------------------------------------------------------------===//
717 We compile this program: (from GCC PR11680)
718 http://gcc.gnu.org/bugzilla/attachment.cgi?id=4487
720 Into code that runs the same speed in fast/slow modes, but both modes run 2x
721 slower than when compile with GCC (either 4.0 or 4.2):
723 $ llvm-g++ perf.cpp -O3 -fno-exceptions
725 1.821u 0.003s 0:01.82 100.0% 0+0k 0+0io 0pf+0w
727 $ g++ perf.cpp -O3 -fno-exceptions
729 0.821u 0.001s 0:00.82 100.0% 0+0k 0+0io 0pf+0w
731 It looks like we are making the same inlining decisions, so this may be raw
732 codegen badness or something else (haven't investigated).
734 //===---------------------------------------------------------------------===//
736 We miss some instcombines for stuff like this:
738 void foo (unsigned int a) {
739 /* This one is equivalent to a >= (3 << 2). */
744 A few other related ones are in GCC PR14753.
746 //===---------------------------------------------------------------------===//
748 Divisibility by constant can be simplified (according to GCC PR12849) from
749 being a mulhi to being a mul lo (cheaper). Testcase:
751 void bar(unsigned n) {
756 This is equivalent to the following, where 2863311531 is the multiplicative
757 inverse of 3, and 1431655766 is ((2^32)-1)/3+1:
758 void bar(unsigned n) {
759 if (n * 2863311531U < 1431655766U)
763 The same transformation can work with an even modulo with the addition of a
764 rotate: rotate the result of the multiply to the right by the number of bits
765 which need to be zero for the condition to be true, and shrink the compare RHS
766 by the same amount. Unless the target supports rotates, though, that
767 transformation probably isn't worthwhile.
769 The transformation can also easily be made to work with non-zero equality
770 comparisons: just transform, for example, "n % 3 == 1" to "(n-1) % 3 == 0".
772 //===---------------------------------------------------------------------===//
774 Better mod/ref analysis for scanf would allow us to eliminate the vtable and a
775 bunch of other stuff from this example (see PR1604):
785 std::scanf("%d", &t.val);
786 std::printf("%d\n", t.val);
789 //===---------------------------------------------------------------------===//
791 These functions perform the same computation, but produce different assembly.
793 define i8 @select(i8 %x) readnone nounwind {
794 %A = icmp ult i8 %x, 250
795 %B = select i1 %A, i8 0, i8 1
799 define i8 @addshr(i8 %x) readnone nounwind {
800 %A = zext i8 %x to i9
801 %B = add i9 %A, 6 ;; 256 - 250 == 6
803 %D = trunc i9 %C to i8
807 //===---------------------------------------------------------------------===//
811 f (unsigned long a, unsigned long b, unsigned long c)
813 return ((a & (c - 1)) != 0) || ((b & (c - 1)) != 0);
816 f (unsigned long a, unsigned long b, unsigned long c)
818 return ((a & (c - 1)) != 0) | ((b & (c - 1)) != 0);
820 Both should combine to ((a|b) & (c-1)) != 0. Currently not optimized with
821 "clang -emit-llvm-bc | opt -std-compile-opts".
823 //===---------------------------------------------------------------------===//
826 #define PMD_MASK (~((1UL << 23) - 1))
827 void clear_pmd_range(unsigned long start, unsigned long end)
829 if (!(start & ~PMD_MASK) && !(end & ~PMD_MASK))
832 The expression should optimize to something like
833 "!((start|end)&~PMD_MASK). Currently not optimized with "clang
834 -emit-llvm-bc | opt -std-compile-opts".
836 //===---------------------------------------------------------------------===//
838 unsigned int f(unsigned int i, unsigned int n) {++i; if (i == n) ++i; return
840 unsigned int f2(unsigned int i, unsigned int n) {++i; i += i == n; return i;}
841 These should combine to the same thing. Currently, the first function
842 produces better code on X86.
844 //===---------------------------------------------------------------------===//
847 #define abs(x) x>0?x:-x
850 return (abs(x)) >= 0;
852 This should optimize to x == INT_MIN. (With -fwrapv.) Currently not
853 optimized with "clang -emit-llvm-bc | opt -std-compile-opts".
855 //===---------------------------------------------------------------------===//
859 rotate_cst (unsigned int a)
861 a = (a << 10) | (a >> 22);
866 minus_cst (unsigned int a)
875 mask_gt (unsigned int a)
877 /* This is equivalent to a > 15. */
882 rshift_gt (unsigned int a)
884 /* This is equivalent to a > 23. */
888 All should simplify to a single comparison. All of these are
889 currently not optimized with "clang -emit-llvm-bc | opt
892 //===---------------------------------------------------------------------===//
895 int c(int* x) {return (char*)x+2 == (char*)x;}
896 Should combine to 0. Currently not optimized with "clang
897 -emit-llvm-bc | opt -std-compile-opts" (although llc can optimize it).
899 //===---------------------------------------------------------------------===//
901 int a(unsigned b) {return ((b << 31) | (b << 30)) >> 31;}
902 Should be combined to "((b >> 1) | b) & 1". Currently not optimized
903 with "clang -emit-llvm-bc | opt -std-compile-opts".
905 //===---------------------------------------------------------------------===//
907 unsigned a(unsigned x, unsigned y) { return x | (y & 1) | (y & 2);}
908 Should combine to "x | (y & 3)". Currently not optimized with "clang
909 -emit-llvm-bc | opt -std-compile-opts".
911 //===---------------------------------------------------------------------===//
913 int a(int a, int b, int c) {return (~a & c) | ((c|a) & b);}
914 Should fold to "(~a & c) | (a & b)". Currently not optimized with
915 "clang -emit-llvm-bc | opt -std-compile-opts".
917 //===---------------------------------------------------------------------===//
919 int a(int a,int b) {return (~(a|b))|a;}
920 Should fold to "a|~b". Currently not optimized with "clang
921 -emit-llvm-bc | opt -std-compile-opts".
923 //===---------------------------------------------------------------------===//
925 int a(int a, int b) {return (a&&b) || (a&&!b);}
926 Should fold to "a". Currently not optimized with "clang -emit-llvm-bc
927 | opt -std-compile-opts".
929 //===---------------------------------------------------------------------===//
931 int a(int a, int b, int c) {return (a&&b) || (!a&&c);}
932 Should fold to "a ? b : c", or at least something sane. Currently not
933 optimized with "clang -emit-llvm-bc | opt -std-compile-opts".
935 //===---------------------------------------------------------------------===//
937 int a(int a, int b, int c) {return (a&&b) || (a&&c) || (a&&b&&c);}
938 Should fold to a && (b || c). Currently not optimized with "clang
939 -emit-llvm-bc | opt -std-compile-opts".
941 //===---------------------------------------------------------------------===//
943 int a(int x) {return x | ((x & 8) ^ 8);}
944 Should combine to x | 8. Currently not optimized with "clang
945 -emit-llvm-bc | opt -std-compile-opts".
947 //===---------------------------------------------------------------------===//
949 int a(int x) {return x ^ ((x & 8) ^ 8);}
950 Should also combine to x | 8. Currently not optimized with "clang
951 -emit-llvm-bc | opt -std-compile-opts".
953 //===---------------------------------------------------------------------===//
955 int a(int x) {return ((x | -9) ^ 8) & x;}
956 Should combine to x & -9. Currently not optimized with "clang
957 -emit-llvm-bc | opt -std-compile-opts".
959 //===---------------------------------------------------------------------===//
961 unsigned a(unsigned a) {return a * 0x11111111 >> 28 & 1;}
962 Should combine to "a * 0x88888888 >> 31". Currently not optimized
963 with "clang -emit-llvm-bc | opt -std-compile-opts".
965 //===---------------------------------------------------------------------===//
967 unsigned a(char* x) {if ((*x & 32) == 0) return b();}
968 There's an unnecessary zext in the generated code with "clang
969 -emit-llvm-bc | opt -std-compile-opts".
971 //===---------------------------------------------------------------------===//
973 unsigned a(unsigned long long x) {return 40 * (x >> 1);}
974 Should combine to "20 * (((unsigned)x) & -2)". Currently not
975 optimized with "clang -emit-llvm-bc | opt -std-compile-opts".
977 //===---------------------------------------------------------------------===//
979 This was noticed in the entryblock for grokdeclarator in 403.gcc:
981 %tmp = icmp eq i32 %decl_context, 4
982 %decl_context_addr.0 = select i1 %tmp, i32 3, i32 %decl_context
983 %tmp1 = icmp eq i32 %decl_context_addr.0, 1
984 %decl_context_addr.1 = select i1 %tmp1, i32 0, i32 %decl_context_addr.0
986 tmp1 should be simplified to something like:
987 (!tmp || decl_context == 1)
989 This allows recursive simplifications, tmp1 is used all over the place in
990 the function, e.g. by:
992 %tmp23 = icmp eq i32 %decl_context_addr.1, 0 ; <i1> [#uses=1]
993 %tmp24 = xor i1 %tmp1, true ; <i1> [#uses=1]
994 %or.cond8 = and i1 %tmp23, %tmp24 ; <i1> [#uses=1]
998 //===---------------------------------------------------------------------===//
1002 Store sinking: This code:
1004 void f (int n, int *cond, int *res) {
1007 for (i = 0; i < n; i++)
1009 *res ^= 234; /* (*) */
1012 On this function GVN hoists the fully redundant value of *res, but nothing
1013 moves the store out. This gives us this code:
1015 bb: ; preds = %bb2, %entry
1016 %.rle = phi i32 [ 0, %entry ], [ %.rle6, %bb2 ]
1017 %i.05 = phi i32 [ 0, %entry ], [ %indvar.next, %bb2 ]
1018 %1 = load i32* %cond, align 4
1019 %2 = icmp eq i32 %1, 0
1020 br i1 %2, label %bb2, label %bb1
1023 %3 = xor i32 %.rle, 234
1024 store i32 %3, i32* %res, align 4
1027 bb2: ; preds = %bb, %bb1
1028 %.rle6 = phi i32 [ %3, %bb1 ], [ %.rle, %bb ]
1029 %indvar.next = add i32 %i.05, 1
1030 %exitcond = icmp eq i32 %indvar.next, %n
1031 br i1 %exitcond, label %return, label %bb
1033 DSE should sink partially dead stores to get the store out of the loop.
1035 Here's another partial dead case:
1036 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12395
1038 //===---------------------------------------------------------------------===//
1040 Scalar PRE hoists the mul in the common block up to the else:
1042 int test (int a, int b, int c, int g) {
1052 It would be better to do the mul once to reduce codesize above the if.
1053 This is GCC PR38204.
1056 //===---------------------------------------------------------------------===//
1057 This simple function from 179.art:
1060 struct { double y; int reset; } *Y;
1065 for (i=0;i<numf2s;i++)
1066 if (Y[i].y > Y[winner].y)
1070 Compiles into (with clang TBAA):
1072 for.body: ; preds = %for.inc, %bb.nph
1073 %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next, %for.inc ]
1074 %i.01718 = phi i32 [ 0, %bb.nph ], [ %i.01719, %for.inc ]
1075 %tmp4 = getelementptr inbounds %struct.anon* %tmp3, i64 %indvar, i32 0
1076 %tmp5 = load double* %tmp4, align 8, !tbaa !4
1077 %idxprom7 = sext i32 %i.01718 to i64
1078 %tmp10 = getelementptr inbounds %struct.anon* %tmp3, i64 %idxprom7, i32 0
1079 %tmp11 = load double* %tmp10, align 8, !tbaa !4
1080 %cmp12 = fcmp ogt double %tmp5, %tmp11
1081 br i1 %cmp12, label %if.then, label %for.inc
1083 if.then: ; preds = %for.body
1084 %i.017 = trunc i64 %indvar to i32
1087 for.inc: ; preds = %for.body, %if.then
1088 %i.01719 = phi i32 [ %i.01718, %for.body ], [ %i.017, %if.then ]
1089 %indvar.next = add i64 %indvar, 1
1090 %exitcond = icmp eq i64 %indvar.next, %tmp22
1091 br i1 %exitcond, label %for.cond.for.end_crit_edge, label %for.body
1094 It is good that we hoisted the reloads of numf2's, and Y out of the loop and
1095 sunk the store to winner out.
1097 However, this is awful on several levels: the conditional truncate in the loop
1098 (-indvars at fault? why can't we completely promote the IV to i64?).
1100 Beyond that, we have a partially redundant load in the loop: if "winner" (aka
1101 %i.01718) isn't updated, we reload Y[winner].y the next time through the loop.
1102 Similarly, the addressing that feeds it (including the sext) is redundant. In
1103 the end we get this generated assembly:
1105 LBB0_2: ## %for.body
1106 ## =>This Inner Loop Header: Depth=1
1110 ucomisd (%rcx,%r8), %xmm0
1119 All things considered this isn't too bad, but we shouldn't need the movslq or
1120 the shlq instruction, or the load folded into ucomisd every time through the
1123 On an x86-specific topic, if the loop can't be restructure, the movl should be a
1126 //===---------------------------------------------------------------------===//
1130 GCC PR37810 is an interesting case where we should sink load/store reload
1131 into the if block and outside the loop, so we don't reload/store it on the
1152 We now hoist the reload after the call (Transforms/GVN/lpre-call-wrap.ll), but
1153 we don't sink the store. We need partially dead store sinking.
1155 //===---------------------------------------------------------------------===//
1157 [LOAD PRE CRIT EDGE SPLITTING]
1159 GCC PR37166: Sinking of loads prevents SROA'ing the "g" struct on the stack
1160 leading to excess stack traffic. This could be handled by GVN with some crazy
1161 symbolic phi translation. The code we get looks like (g is on the stack):
1165 %9 = getelementptr %struct.f* %g, i32 0, i32 0
1166 store i32 %8, i32* %9, align bel %bb3
1168 bb3: ; preds = %bb1, %bb2, %bb
1169 %c_addr.0 = phi %struct.f* [ %g, %bb2 ], [ %c, %bb ], [ %c, %bb1 ]
1170 %b_addr.0 = phi %struct.f* [ %b, %bb2 ], [ %g, %bb ], [ %b, %bb1 ]
1171 %10 = getelementptr %struct.f* %c_addr.0, i32 0, i32 0
1172 %11 = load i32* %10, align 4
1174 %11 is partially redundant, an in BB2 it should have the value %8.
1176 GCC PR33344 and PR35287 are similar cases.
1179 //===---------------------------------------------------------------------===//
1183 There are many load PRE testcases in testsuite/gcc.dg/tree-ssa/loadpre* in the
1184 GCC testsuite, ones we don't get yet are (checked through loadpre25):
1186 [CRIT EDGE BREAKING]
1187 loadpre3.c predcom-4.c
1189 [PRE OF READONLY CALL]
1192 [TURN SELECT INTO BRANCH]
1193 loadpre14.c loadpre15.c
1195 actually a conditional increment: loadpre18.c loadpre19.c
1197 //===---------------------------------------------------------------------===//
1199 [LOAD PRE / STORE SINKING / SPEC HACK]
1201 This is a chunk of code from 456.hmmer:
1203 int f(int M, int *mc, int *mpp, int *tpmm, int *ip, int *tpim, int *dpp,
1204 int *tpdm, int xmb, int *bp, int *ms) {
1206 for (k = 1; k <= M; k++) {
1207 mc[k] = mpp[k-1] + tpmm[k-1];
1208 if ((sc = ip[k-1] + tpim[k-1]) > mc[k]) mc[k] = sc;
1209 if ((sc = dpp[k-1] + tpdm[k-1]) > mc[k]) mc[k] = sc;
1210 if ((sc = xmb + bp[k]) > mc[k]) mc[k] = sc;
1215 It is very profitable for this benchmark to turn the conditional stores to mc[k]
1216 into a conditional move (select instr in IR) and allow the final store to do the
1217 store. See GCC PR27313 for more details. Note that this is valid to xform even
1218 with the new C++ memory model, since mc[k] is previously loaded and later
1221 //===---------------------------------------------------------------------===//
1224 There are many PRE testcases in testsuite/gcc.dg/tree-ssa/ssa-pre-*.c in the
1227 //===---------------------------------------------------------------------===//
1229 There are some interesting cases in testsuite/gcc.dg/tree-ssa/pred-comm* in the
1230 GCC testsuite. For example, we get the first example in predcom-1.c, but
1231 miss the second one:
1236 __attribute__ ((noinline))
1237 void count_averages(int n) {
1239 for (i = 1; i < n; i++)
1240 avg[i] = (((unsigned long) fib[i - 1] + fib[i] + fib[i + 1]) / 3) & 0xffff;
1243 which compiles into two loads instead of one in the loop.
1245 predcom-2.c is the same as predcom-1.c
1247 predcom-3.c is very similar but needs loads feeding each other instead of
1251 //===---------------------------------------------------------------------===//
1255 Type based alias analysis:
1256 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14705
1258 We should do better analysis of posix_memalign. At the least it should
1259 no-capture its pointer argument, at best, we should know that the out-value
1260 result doesn't point to anything (like malloc). One example of this is in
1261 SingleSource/Benchmarks/Misc/dt.c
1263 //===---------------------------------------------------------------------===//
1265 A/B get pinned to the stack because we turn an if/then into a select instead
1266 of PRE'ing the load/store. This may be fixable in instcombine:
1267 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=37892
1269 struct X { int i; };
1283 //===---------------------------------------------------------------------===//
1285 Interesting missed case because of control flow flattening (should be 2 loads):
1286 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=26629
1287 With: llvm-gcc t2.c -S -o - -O0 -emit-llvm | llvm-as |
1288 opt -mem2reg -gvn -instcombine | llvm-dis
1289 we miss it because we need 1) CRIT EDGE 2) MULTIPLE DIFFERENT
1290 VALS PRODUCED BY ONE BLOCK OVER DIFFERENT PATHS
1292 //===---------------------------------------------------------------------===//
1294 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19633
1295 We could eliminate the branch condition here, loading from null is undefined:
1297 struct S { int w, x, y, z; };
1298 struct T { int r; struct S s; };
1299 void bar (struct S, int);
1300 void foo (int a, struct T b)
1308 //===---------------------------------------------------------------------===//
1310 simplifylibcalls should do several optimizations for strspn/strcspn:
1312 strcspn(x, "a") -> inlined loop for up to 3 letters (similarly for strspn):
1314 size_t __strcspn_c3 (__const char *__s, int __reject1, int __reject2,
1316 register size_t __result = 0;
1317 while (__s[__result] != '\0' && __s[__result] != __reject1 &&
1318 __s[__result] != __reject2 && __s[__result] != __reject3)
1323 This should turn into a switch on the character. See PR3253 for some notes on
1326 456.hmmer apparently uses strcspn and strspn a lot. 471.omnetpp uses strspn.
1328 //===---------------------------------------------------------------------===//
1330 "gas" uses this idiom:
1331 else if (strchr ("+-/*%|&^:[]()~", *intel_parser.op_string))
1333 else if (strchr ("<>", *intel_parser.op_string)
1335 Those should be turned into a switch.
1337 //===---------------------------------------------------------------------===//
1339 252.eon contains this interesting code:
1341 %3072 = getelementptr [100 x i8]* %tempString, i32 0, i32 0
1342 %3073 = call i8* @strcpy(i8* %3072, i8* %3071) nounwind
1343 %strlen = call i32 @strlen(i8* %3072) ; uses = 1
1344 %endptr = getelementptr [100 x i8]* %tempString, i32 0, i32 %strlen
1345 call void @llvm.memcpy.i32(i8* %endptr,
1346 i8* getelementptr ([5 x i8]* @"\01LC42", i32 0, i32 0), i32 5, i32 1)
1347 %3074 = call i32 @strlen(i8* %endptr) nounwind readonly
1349 This is interesting for a couple reasons. First, in this:
1351 The memcpy+strlen strlen can be replaced with:
1353 %3074 = call i32 @strlen([5 x i8]* @"\01LC42") nounwind readonly
1355 Because the destination was just copied into the specified memory buffer. This,
1356 in turn, can be constant folded to "4".
1358 In other code, it contains:
1360 %endptr6978 = bitcast i8* %endptr69 to i32*
1361 store i32 7107374, i32* %endptr6978, align 1
1362 %3167 = call i32 @strlen(i8* %endptr69) nounwind readonly
1364 Which could also be constant folded. Whatever is producing this should probably
1365 be fixed to leave this as a memcpy from a string.
1367 Further, eon also has an interesting partially redundant strlen call:
1369 bb8: ; preds = %_ZN18eonImageCalculatorC1Ev.exit
1370 %682 = getelementptr i8** %argv, i32 6 ; <i8**> [#uses=2]
1371 %683 = load i8** %682, align 4 ; <i8*> [#uses=4]
1372 %684 = load i8* %683, align 1 ; <i8> [#uses=1]
1373 %685 = icmp eq i8 %684, 0 ; <i1> [#uses=1]
1374 br i1 %685, label %bb10, label %bb9
1377 %686 = call i32 @strlen(i8* %683) nounwind readonly
1378 %687 = icmp ugt i32 %686, 254 ; <i1> [#uses=1]
1379 br i1 %687, label %bb10, label %bb11
1381 bb10: ; preds = %bb9, %bb8
1382 %688 = call i32 @strlen(i8* %683) nounwind readonly
1384 This could be eliminated by doing the strlen once in bb8, saving code size and
1385 improving perf on the bb8->9->10 path.
1387 //===---------------------------------------------------------------------===//
1389 I see an interesting fully redundant call to strlen left in 186.crafty:InputMove
1391 %movetext11 = getelementptr [128 x i8]* %movetext, i32 0, i32 0
1394 bb62: ; preds = %bb55, %bb53
1395 %promote.0 = phi i32 [ %169, %bb55 ], [ 0, %bb53 ]
1396 %171 = call i32 @strlen(i8* %movetext11) nounwind readonly align 1
1397 %172 = add i32 %171, -1 ; <i32> [#uses=1]
1398 %173 = getelementptr [128 x i8]* %movetext, i32 0, i32 %172
1401 br i1 %or.cond, label %bb65, label %bb72
1403 bb65: ; preds = %bb62
1404 store i8 0, i8* %173, align 1
1407 bb72: ; preds = %bb65, %bb62
1408 %trank.1 = phi i32 [ %176, %bb65 ], [ -1, %bb62 ]
1409 %177 = call i32 @strlen(i8* %movetext11) nounwind readonly align 1
1411 Note that on the bb62->bb72 path, that the %177 strlen call is partially
1412 redundant with the %171 call. At worst, we could shove the %177 strlen call
1413 up into the bb65 block moving it out of the bb62->bb72 path. However, note
1414 that bb65 stores to the string, zeroing out the last byte. This means that on
1415 that path the value of %177 is actually just %171-1. A sub is cheaper than a
1418 This pattern repeats several times, basically doing:
1423 where it is "obvious" that B = A-1.
1425 //===---------------------------------------------------------------------===//
1427 186.crafty has this interesting pattern with the "out.4543" variable:
1429 call void @llvm.memcpy.i32(
1430 i8* getelementptr ([10 x i8]* @out.4543, i32 0, i32 0),
1431 i8* getelementptr ([7 x i8]* @"\01LC28700", i32 0, i32 0), i32 7, i32 1)
1432 %101 = call@printf(i8* ... @out.4543, i32 0, i32 0)) nounwind
1434 It is basically doing:
1436 memcpy(globalarray, "string");
1437 printf(..., globalarray);
1439 Anyway, by knowing that printf just reads the memory and forward substituting
1440 the string directly into the printf, this eliminates reads from globalarray.
1441 Since this pattern occurs frequently in crafty (due to the "DisplayTime" and
1442 other similar functions) there are many stores to "out". Once all the printfs
1443 stop using "out", all that is left is the memcpy's into it. This should allow
1444 globalopt to remove the "stored only" global.
1446 //===---------------------------------------------------------------------===//
1450 define inreg i32 @foo(i8* inreg %p) nounwind {
1452 %tmp1 = ashr i8 %tmp0, 5
1453 %tmp2 = sext i8 %tmp1 to i32
1457 could be dagcombine'd to a sign-extending load with a shift.
1458 For example, on x86 this currently gets this:
1464 while it could get this:
1469 //===---------------------------------------------------------------------===//
1473 int test(int x) { return 1-x == x; } // --> return false
1474 int test2(int x) { return 2-x == x; } // --> return x == 1 ?
1476 Always foldable for odd constants, what is the rule for even?
1478 //===---------------------------------------------------------------------===//
1480 PR 3381: GEP to field of size 0 inside a struct could be turned into GEP
1481 for next field in struct (which is at same address).
1483 For example: store of float into { {{}}, float } could be turned into a store to
1486 //===---------------------------------------------------------------------===//
1488 The arg promotion pass should make use of nocapture to make its alias analysis
1489 stuff much more precise.
1491 //===---------------------------------------------------------------------===//
1493 The following functions should be optimized to use a select instead of a
1494 branch (from gcc PR40072):
1496 char char_int(int m) {if(m>7) return 0; return m;}
1497 int int_char(char m) {if(m>7) return 0; return m;}
1499 //===---------------------------------------------------------------------===//
1501 int func(int a, int b) { if (a & 0x80) b |= 0x80; else b &= ~0x80; return b; }
1505 define i32 @func(i32 %a, i32 %b) nounwind readnone ssp {
1507 %0 = and i32 %a, 128 ; <i32> [#uses=1]
1508 %1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
1509 %2 = or i32 %b, 128 ; <i32> [#uses=1]
1510 %3 = and i32 %b, -129 ; <i32> [#uses=1]
1511 %b_addr.0 = select i1 %1, i32 %3, i32 %2 ; <i32> [#uses=1]
1515 However, it's functionally equivalent to:
1517 b = (b & ~0x80) | (a & 0x80);
1519 Which generates this:
1521 define i32 @func(i32 %a, i32 %b) nounwind readnone ssp {
1523 %0 = and i32 %b, -129 ; <i32> [#uses=1]
1524 %1 = and i32 %a, 128 ; <i32> [#uses=1]
1525 %2 = or i32 %0, %1 ; <i32> [#uses=1]
1529 This can be generalized for other forms:
1531 b = (b & ~0x80) | (a & 0x40) << 1;
1533 //===---------------------------------------------------------------------===//
1535 These two functions produce different code. They shouldn't:
1539 uint8_t p1(uint8_t b, uint8_t a) {
1540 b = (b & ~0xc0) | (a & 0xc0);
1544 uint8_t p2(uint8_t b, uint8_t a) {
1545 b = (b & ~0x40) | (a & 0x40);
1546 b = (b & ~0x80) | (a & 0x80);
1550 define zeroext i8 @p1(i8 zeroext %b, i8 zeroext %a) nounwind readnone ssp {
1552 %0 = and i8 %b, 63 ; <i8> [#uses=1]
1553 %1 = and i8 %a, -64 ; <i8> [#uses=1]
1554 %2 = or i8 %1, %0 ; <i8> [#uses=1]
1558 define zeroext i8 @p2(i8 zeroext %b, i8 zeroext %a) nounwind readnone ssp {
1560 %0 = and i8 %b, 63 ; <i8> [#uses=1]
1561 %.masked = and i8 %a, 64 ; <i8> [#uses=1]
1562 %1 = and i8 %a, -128 ; <i8> [#uses=1]
1563 %2 = or i8 %1, %0 ; <i8> [#uses=1]
1564 %3 = or i8 %2, %.masked ; <i8> [#uses=1]
1568 //===---------------------------------------------------------------------===//
1570 IPSCCP does not currently propagate argument dependent constants through
1571 functions where it does not not all of the callers. This includes functions
1572 with normal external linkage as well as templates, C99 inline functions etc.
1573 Specifically, it does nothing to:
1575 define i32 @test(i32 %x, i32 %y, i32 %z) nounwind {
1577 %0 = add nsw i32 %y, %z
1580 %3 = add nsw i32 %1, %2
1584 define i32 @test2() nounwind {
1586 %0 = call i32 @test(i32 1, i32 2, i32 4) nounwind
1590 It would be interesting extend IPSCCP to be able to handle simple cases like
1591 this, where all of the arguments to a call are constant. Because IPSCCP runs
1592 before inlining, trivial templates and inline functions are not yet inlined.
1593 The results for a function + set of constant arguments should be memoized in a
1596 //===---------------------------------------------------------------------===//
1598 The libcall constant folding stuff should be moved out of SimplifyLibcalls into
1599 libanalysis' constantfolding logic. This would allow IPSCCP to be able to
1600 handle simple things like this:
1602 static int foo(const char *X) { return strlen(X); }
1603 int bar() { return foo("abcd"); }
1605 //===---------------------------------------------------------------------===//
1607 functionattrs doesn't know much about memcpy/memset. This function should be
1608 marked readnone rather than readonly, since it only twiddles local memory, but
1609 functionattrs doesn't handle memset/memcpy/memmove aggressively:
1611 struct X { int *p; int *q; };
1618 p = __builtin_memcpy (&x, &y, sizeof (int *));
1622 This can be seen at:
1623 $ clang t.c -S -o - -mkernel -O0 -emit-llvm | opt -functionattrs -S
1626 //===---------------------------------------------------------------------===//
1628 Missed instcombine transformation:
1629 define i1 @a(i32 %x) nounwind readnone {
1631 %cmp = icmp eq i32 %x, 30
1632 %sub = add i32 %x, -30
1633 %cmp2 = icmp ugt i32 %sub, 9
1634 %or = or i1 %cmp, %cmp2
1637 This should be optimized to a single compare. Testcase derived from gcc.
1639 //===---------------------------------------------------------------------===//
1641 Missed instcombine or reassociate transformation:
1642 int a(int a, int b) { return (a==12)&(b>47)&(b<58); }
1644 The sgt and slt should be combined into a single comparison. Testcase derived
1647 //===---------------------------------------------------------------------===//
1649 Missed instcombine transformation:
1651 %382 = srem i32 %tmp14.i, 64 ; [#uses=1]
1652 %383 = zext i32 %382 to i64 ; [#uses=1]
1653 %384 = shl i64 %381, %383 ; [#uses=1]
1654 %385 = icmp slt i32 %tmp14.i, 64 ; [#uses=1]
1656 The srem can be transformed to an and because if %tmp14.i is negative, the
1657 shift is undefined. Testcase derived from 403.gcc.
1659 //===---------------------------------------------------------------------===//
1661 This is a range comparison on a divided result (from 403.gcc):
1663 %1337 = sdiv i32 %1336, 8 ; [#uses=1]
1664 %.off.i208 = add i32 %1336, 7 ; [#uses=1]
1665 %1338 = icmp ult i32 %.off.i208, 15 ; [#uses=1]
1667 We already catch this (removing the sdiv) if there isn't an add, we should
1668 handle the 'add' as well. This is a common idiom with it's builtin_alloca code.
1671 int a(int x) { return (unsigned)(x/16+7) < 15; }
1673 Another similar case involves truncations on 64-bit targets:
1675 %361 = sdiv i64 %.046, 8 ; [#uses=1]
1676 %362 = trunc i64 %361 to i32 ; [#uses=2]
1678 %367 = icmp eq i32 %362, 0 ; [#uses=1]
1680 //===---------------------------------------------------------------------===//
1682 Missed instcombine/dagcombine transformation:
1683 define void @lshift_lt(i8 zeroext %a) nounwind {
1685 %conv = zext i8 %a to i32
1686 %shl = shl i32 %conv, 3
1687 %cmp = icmp ult i32 %shl, 33
1688 br i1 %cmp, label %if.then, label %if.end
1691 tail call void @bar() nounwind
1697 declare void @bar() nounwind
1699 The shift should be eliminated. Testcase derived from gcc.
1701 //===---------------------------------------------------------------------===//
1703 These compile into different code, one gets recognized as a switch and the
1704 other doesn't due to phase ordering issues (PR6212):
1706 int test1(int mainType, int subType) {
1709 else if (mainType == 9)
1711 else if (mainType == 11)
1716 int test2(int mainType, int subType) {
1726 //===---------------------------------------------------------------------===//
1728 The following test case (from PR6576):
1730 define i32 @mul(i32 %a, i32 %b) nounwind readnone {
1732 %cond1 = icmp eq i32 %b, 0 ; <i1> [#uses=1]
1733 br i1 %cond1, label %exit, label %bb.nph
1734 bb.nph: ; preds = %entry
1735 %tmp = mul i32 %b, %a ; <i32> [#uses=1]
1737 exit: ; preds = %entry
1741 could be reduced to:
1743 define i32 @mul(i32 %a, i32 %b) nounwind readnone {
1745 %tmp = mul i32 %b, %a
1749 //===---------------------------------------------------------------------===//
1751 We should use DSE + llvm.lifetime.end to delete dead vtable pointer updates.
1754 Another interesting case is that something related could be used for variables
1755 that go const after their ctor has finished. In these cases, globalopt (which
1756 can statically run the constructor) could mark the global const (so it gets put
1757 in the readonly section). A testcase would be:
1760 using namespace std;
1761 const complex<char> should_be_in_rodata (42,-42);
1762 complex<char> should_be_in_data (42,-42);
1763 complex<char> should_be_in_bss;
1765 Where we currently evaluate the ctors but the globals don't become const because
1766 the optimizer doesn't know they "become const" after the ctor is done. See
1767 GCC PR4131 for more examples.
1769 //===---------------------------------------------------------------------===//
1774 return x > 1 ? x : 1;
1777 LLVM emits a comparison with 1 instead of 0. 0 would be equivalent
1778 and cheaper on most targets.
1780 LLVM prefers comparisons with zero over non-zero in general, but in this
1781 case it choses instead to keep the max operation obvious.
1783 //===---------------------------------------------------------------------===//
1785 Take the following testcase on x86-64 (similar testcases exist for all targets
1788 define void @a(i64* nocapture %s, i64* nocapture %t, i64 %a, i64 %b,
1791 %0 = zext i64 %a to i128 ; <i128> [#uses=1]
1792 %1 = zext i64 %b to i128 ; <i128> [#uses=1]
1793 %2 = add i128 %1, %0 ; <i128> [#uses=2]
1794 %3 = zext i64 %c to i128 ; <i128> [#uses=1]
1795 %4 = shl i128 %3, 64 ; <i128> [#uses=1]
1796 %5 = add i128 %4, %2 ; <i128> [#uses=1]
1797 %6 = lshr i128 %5, 64 ; <i128> [#uses=1]
1798 %7 = trunc i128 %6 to i64 ; <i64> [#uses=1]
1799 store i64 %7, i64* %s, align 8
1800 %8 = trunc i128 %2 to i64 ; <i64> [#uses=1]
1801 store i64 %8, i64* %t, align 8
1821 The generated SelectionDAG has an ADD of an ADDE, where both operands of the
1822 ADDE are zero. Replacing one of the operands of the ADDE with the other operand
1823 of the ADD, and replacing the ADD with the ADDE, should give the desired result.
1825 (That said, we are doing a lot better than gcc on this testcase. :) )
1827 //===---------------------------------------------------------------------===//
1829 Switch lowering generates less than ideal code for the following switch:
1830 define void @a(i32 %x) nounwind {
1832 switch i32 %x, label %if.end [
1833 i32 0, label %if.then
1834 i32 1, label %if.then
1835 i32 2, label %if.then
1836 i32 3, label %if.then
1837 i32 5, label %if.then
1840 tail call void @foo() nounwind
1847 Generated code on x86-64 (other platforms give similar results):
1860 The movl+movl+btq+jb could be simplified to a cmpl+jne.
1862 Or, if we wanted to be really clever, we could simplify the whole thing to
1863 something like the following, which eliminates a branch:
1870 //===---------------------------------------------------------------------===//
1871 Given a branch where the two target blocks are identical ("ret i32 %b" in
1872 both), simplifycfg will simplify them away. But not so for a switch statement:
1874 define i32 @f(i32 %a, i32 %b) nounwind readnone {
1876 switch i32 %a, label %bb3 [
1881 bb: ; preds = %entry, %entry
1884 bb3: ; preds = %entry
1887 //===---------------------------------------------------------------------===//
1889 clang -O3 fails to devirtualize this virtual inheritance case: (GCC PR45875)
1890 Looks related to PR3100
1894 virtual void foo ();
1896 struct c11 : c10, c1{
1899 struct c28 : virtual c11{
1908 //===---------------------------------------------------------------------===//
1912 int foo(int a) { return (a & (~15)) / 16; }
1916 define i32 @foo(i32 %a) nounwind readnone ssp {
1918 %and = and i32 %a, -16
1919 %div = sdiv i32 %and, 16
1923 but this code (X & -A)/A is X >> log2(A) when A is a power of 2, so this case
1924 should be instcombined into just "a >> 4".
1926 We do get this at the codegen level, so something knows about it, but
1927 instcombine should catch it earlier:
1935 //===---------------------------------------------------------------------===//
1937 This code (from GCC PR28685):
1939 int test(int a, int b) {
1949 define i32 @test(i32 %a, i32 %b) nounwind readnone ssp {
1951 %cmp = icmp slt i32 %a, %b
1952 br i1 %cmp, label %return, label %if.end
1954 if.end: ; preds = %entry
1955 %cmp5 = icmp eq i32 %a, %b
1956 %conv6 = zext i1 %cmp5 to i32
1959 return: ; preds = %entry
1965 define i32 @test__(i32 %a, i32 %b) nounwind readnone ssp {
1967 %0 = icmp sle i32 %a, %b
1968 %retval = zext i1 %0 to i32
1972 //===---------------------------------------------------------------------===//
1974 This code can be seen in viterbi:
1976 %64 = call noalias i8* @malloc(i64 %62) nounwind
1978 %67 = call i64 @llvm.objectsize.i64(i8* %64, i1 false) nounwind
1979 %68 = call i8* @__memset_chk(i8* %64, i32 0, i64 %62, i64 %67) nounwind
1981 llvm.objectsize.i64 should be taught about malloc/calloc, allowing it to
1982 fold to %62. This is a security win (overflows of malloc will get caught)
1983 and also a performance win by exposing more memsets to the optimizer.
1985 This occurs several times in viterbi.
1987 Note that this would change the semantics of @llvm.objectsize which by its
1988 current definition always folds to a constant. We also should make sure that
1989 we remove checking in code like
1991 char *p = malloc(strlen(s)+1);
1992 __strcpy_chk(p, s, __builtin_objectsize(p, 0));
1994 //===---------------------------------------------------------------------===//
1996 This code (from Benchmarks/Dhrystone/dry.c):
1998 define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
2000 %sext = shl i32 %0, 24
2001 %conv = ashr i32 %sext, 24
2002 %sext6 = shl i32 %1, 24
2003 %conv4 = ashr i32 %sext6, 24
2004 %cmp = icmp eq i32 %conv, %conv4
2005 %. = select i1 %cmp, i32 10000, i32 0
2009 Should be simplified into something like:
2011 define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
2013 %sext = shl i32 %0, 24
2014 %conv = and i32 %sext, 0xFF000000
2015 %sext6 = shl i32 %1, 24
2016 %conv4 = and i32 %sext6, 0xFF000000
2017 %cmp = icmp eq i32 %conv, %conv4
2018 %. = select i1 %cmp, i32 10000, i32 0
2024 define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
2026 %conv = and i32 %0, 0xFF
2027 %conv4 = and i32 %1, 0xFF
2028 %cmp = icmp eq i32 %conv, %conv4
2029 %. = select i1 %cmp, i32 10000, i32 0
2032 //===---------------------------------------------------------------------===//
2034 clang -O3 currently compiles this code
2036 int g(unsigned int a) {
2037 unsigned int c[100];
2040 unsigned int b = c[10] + c[11];
2048 define i32 @g(i32 a) nounwind readnone {
2049 %add = shl i32 %a, 1
2050 %mul = shl i32 %a, 1
2051 %cmp = icmp ugt i32 %add, %mul
2052 %a.addr.0 = select i1 %cmp, i32 11, i32 15
2056 The icmp should fold to false. This CSE opportunity is only available
2057 after GVN and InstCombine have run.
2059 //===---------------------------------------------------------------------===//
2061 memcpyopt should turn this:
2063 define i8* @test10(i32 %x) {
2064 %alloc = call noalias i8* @malloc(i32 %x) nounwind
2065 call void @llvm.memset.p0i8.i32(i8* %alloc, i8 0, i32 %x, i32 1, i1 false)
2069 into a call to calloc. We should make sure that we analyze calloc as
2070 aggressively as malloc though.
2072 //===---------------------------------------------------------------------===//
2074 clang -O3 doesn't optimize this:
2076 void f1(int* begin, int* end) {
2077 std::fill(begin, end, 0);
2080 into a memset. This is PR8942.
2082 //===---------------------------------------------------------------------===//
2084 clang -O3 -fno-exceptions currently compiles this code:
2087 std::vector<int> v(N);
2089 extern void sink(void*); sink(&v);
2094 define void @_Z1fi(i32 %N) nounwind {
2096 %v2 = alloca [3 x i32*], align 8
2097 %v2.sub = getelementptr inbounds [3 x i32*]* %v2, i64 0, i64 0
2098 %tmpcast = bitcast [3 x i32*]* %v2 to %"class.std::vector"*
2099 %conv = sext i32 %N to i64
2100 store i32* null, i32** %v2.sub, align 8, !tbaa !0
2101 %tmp3.i.i.i.i.i = getelementptr inbounds [3 x i32*]* %v2, i64 0, i64 1
2102 store i32* null, i32** %tmp3.i.i.i.i.i, align 8, !tbaa !0
2103 %tmp4.i.i.i.i.i = getelementptr inbounds [3 x i32*]* %v2, i64 0, i64 2
2104 store i32* null, i32** %tmp4.i.i.i.i.i, align 8, !tbaa !0
2105 %cmp.i.i.i.i = icmp eq i32 %N, 0
2106 br i1 %cmp.i.i.i.i, label %_ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.thread.i.i, label %cond.true.i.i.i.i
2108 _ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.thread.i.i: ; preds = %entry
2109 store i32* null, i32** %v2.sub, align 8, !tbaa !0
2110 store i32* null, i32** %tmp3.i.i.i.i.i, align 8, !tbaa !0
2111 %add.ptr.i5.i.i = getelementptr inbounds i32* null, i64 %conv
2112 store i32* %add.ptr.i5.i.i, i32** %tmp4.i.i.i.i.i, align 8, !tbaa !0
2113 br label %_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_.exit
2115 cond.true.i.i.i.i: ; preds = %entry
2116 %cmp.i.i.i.i.i = icmp slt i32 %N, 0
2117 br i1 %cmp.i.i.i.i.i, label %if.then.i.i.i.i.i, label %_ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.i.i
2119 if.then.i.i.i.i.i: ; preds = %cond.true.i.i.i.i
2120 call void @_ZSt17__throw_bad_allocv() noreturn nounwind
2123 _ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.i.i: ; preds = %cond.true.i.i.i.i
2124 %mul.i.i.i.i.i = shl i64 %conv, 2
2125 %call3.i.i.i.i.i = call noalias i8* @_Znwm(i64 %mul.i.i.i.i.i) nounwind
2126 %0 = bitcast i8* %call3.i.i.i.i.i to i32*
2127 store i32* %0, i32** %v2.sub, align 8, !tbaa !0
2128 store i32* %0, i32** %tmp3.i.i.i.i.i, align 8, !tbaa !0
2129 %add.ptr.i.i.i = getelementptr inbounds i32* %0, i64 %conv
2130 store i32* %add.ptr.i.i.i, i32** %tmp4.i.i.i.i.i, align 8, !tbaa !0
2131 call void @llvm.memset.p0i8.i64(i8* %call3.i.i.i.i.i, i8 0, i64 %mul.i.i.i.i.i, i32 4, i1 false)
2132 br label %_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_.exit
2134 This is just the handling the construction of the vector. Most surprising here
2135 is the fact that all three null stores in %entry are dead (because we do no
2138 Also surprising is that %conv isn't simplified to 0 in %....exit.thread.i.i.
2139 This is a because the client of LazyValueInfo doesn't simplify all instruction
2140 operands, just selected ones.
2142 //===---------------------------------------------------------------------===//
2144 clang -O3 -fno-exceptions currently compiles this code:
2146 void f(char* a, int n) {
2147 __builtin_memset(a, 0, n);
2148 for (int i = 0; i < n; ++i)
2154 define void @_Z1fPci(i8* nocapture %a, i32 %n) nounwind {
2156 %conv = sext i32 %n to i64
2157 tail call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 %conv, i32 1, i1 false)
2158 %cmp8 = icmp sgt i32 %n, 0
2159 br i1 %cmp8, label %for.body.lr.ph, label %for.end
2161 for.body.lr.ph: ; preds = %entry
2162 %tmp10 = add i32 %n, -1
2163 %tmp11 = zext i32 %tmp10 to i64
2164 %tmp12 = add i64 %tmp11, 1
2165 call void @llvm.memset.p0i8.i64(i8* %a, i8 0, i64 %tmp12, i32 1, i1 false)
2168 for.end: ; preds = %entry
2172 This shouldn't need the ((zext (%n - 1)) + 1) game, and it should ideally fold
2173 the two memset's together. The issue with %n seems to stem from poor handling
2174 of the original loop.
2176 To simplify this, we need SCEV to know that "n != 0" because of the dominating
2177 conditional. That would turn the second memset into a simple memset of 'n'.
2179 //===---------------------------------------------------------------------===//
2181 clang -O3 -fno-exceptions currently compiles this code:
2184 unsigned short m1, m2;
2185 unsigned char m3, m4;
2189 std::vector<S> v(N);
2190 extern void sink(void*); sink(&v);
2193 into poor code for zero-initializing 'v' when N is >0. The problem is that
2194 S is only 6 bytes, but each element is 8 byte-aligned. We generate a loop and
2195 4 stores on each iteration. If the struct were 8 bytes, this gets turned into
2198 In order to handle this we have to:
2199 A) Teach clang to generate metadata for memsets of structs that have holes in
2201 B) Teach clang to use such a memset for zero init of this struct (since it has
2202 a hole), instead of doing elementwise zeroing.
2204 //===---------------------------------------------------------------------===//
2206 clang -O3 currently compiles this code:
2208 extern const int magic;
2209 double f() { return 0.0 * magic; }
2213 @magic = external constant i32
2215 define double @_Z1fv() nounwind readnone {
2217 %tmp = load i32* @magic, align 4, !tbaa !0
2218 %conv = sitofp i32 %tmp to double
2219 %mul = fmul double %conv, 0.000000e+00
2223 We should be able to fold away this fmul to 0.0. More generally, fmul(x,0.0)
2224 can be folded to 0.0 if we can prove that the LHS is not -0.0, not a NaN, and
2225 not an INF. The CannotBeNegativeZero predicate in value tracking should be
2226 extended to support general "fpclassify" operations that can return
2227 yes/no/unknown for each of these predicates.
2229 In this predicate, we know that uitofp is trivially never NaN or -0.0, and
2230 we know that it isn't +/-Inf if the floating point type has enough exponent bits
2231 to represent the largest integer value as < inf.
2233 //===---------------------------------------------------------------------===//
2235 When optimizing a transformation that can change the sign of 0.0 (such as the
2236 0.0*val -> 0.0 transformation above), it might be provable that the sign of the
2237 expression doesn't matter. For example, by the above rules, we can't transform
2238 fmul(sitofp(x), 0.0) into 0.0, because x might be -1 and the result of the
2239 expression is defined to be -0.0.
2241 If we look at the uses of the fmul for example, we might be able to prove that
2242 all uses don't care about the sign of zero. For example, if we have:
2244 fadd(fmul(sitofp(x), 0.0), 2.0)
2246 Since we know that x+2.0 doesn't care about the sign of any zeros in X, we can
2247 transform the fmul to 0.0, and then the fadd to 2.0.
2249 //===---------------------------------------------------------------------===//
2251 We should enhance memcpy/memcpy/memset to allow a metadata node on them
2252 indicating that some bytes of the transfer are undefined. This is useful for
2253 frontends like clang when lowering struct copies, when some elements of the
2254 struct are undefined. Consider something like this:
2260 void foo(struct x*P);
2261 struct x testfunc() {
2269 We currently compile this to:
2270 $ clang t.c -S -o - -O0 -emit-llvm | opt -scalarrepl -S
2273 %struct.x = type { i8, [4 x i32] }
2275 define void @testfunc(%struct.x* sret %agg.result) nounwind ssp {
2277 %V1 = alloca %struct.x, align 4
2278 call void @foo(%struct.x* %V1)
2279 %tmp1 = bitcast %struct.x* %V1 to i8*
2280 %0 = bitcast %struct.x* %V1 to i160*
2281 %srcval1 = load i160* %0, align 4
2282 %tmp2 = bitcast %struct.x* %agg.result to i8*
2283 %1 = bitcast %struct.x* %agg.result to i160*
2284 store i160 %srcval1, i160* %1, align 4
2288 This happens because SRoA sees that the temp alloca has is being memcpy'd into
2289 and out of and it has holes and it has to be conservative. If we knew about the
2290 holes, then this could be much much better.
2292 Having information about these holes would also improve memcpy (etc) lowering at
2293 llc time when it gets inlined, because we can use smaller transfers. This also
2294 avoids partial register stalls in some important cases.
2296 //===---------------------------------------------------------------------===//
2298 We miss an optzn when lowering divide by some constants. For example:
2299 int test(int x) { return x/10; }
2306 imulq $1717986919, %rax, %rax ## imm = 0x66666667
2314 The two starred instructions could be replaced with a "sarl $34, %rax". This
2315 occurs in 186.crafty very frequently.
2317 //===---------------------------------------------------------------------===//