1 //===-- FPMover.cpp - SparcV8 double-precision floating point move fixer --===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Turns FpMOVD instructions into FMOVS pairs after regalloc.
12 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/MachineFunctionPass.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "llvm/ADT/Statistic.h"
18 #include "llvm/Support/Debug.h"
22 Statistic<> NumFpMOVDs ("fpmover", "# FpMOVD instructions translated");
23 Statistic<> SkippedFpMOVDs ("fpmover", "# FpMOVD instructions skipped");
25 struct FPMover : public MachineFunctionPass {
26 /// Target machine description which we query for reg. names, data
31 FPMover (TargetMachine &tm) : TM (tm) { }
33 virtual const char *getPassName () const {
34 return "SparcV8 Double-FP Move Fixer";
37 bool runOnMachineBasicBlock (MachineBasicBlock &MBB);
38 bool runOnMachineFunction (MachineFunction &F) {
40 for (MachineFunction::iterator FI = F.begin (), FE = F.end ();
42 Changed |= runOnMachineBasicBlock (*FI);
47 } // end of anonymous namespace
49 /// createSparcV8FPMoverPass - Returns a pass that turns FpMOVD
50 /// instructions into FMOVS instructions
52 FunctionPass *llvm::createSparcV8FPMoverPass (TargetMachine &tm) {
53 return new FPMover (tm);
56 static void doubleToSingleRegPair(unsigned doubleReg, unsigned &singleReg1,
57 unsigned &singleReg2) {
58 const unsigned EvenHalvesOfPairs[] = {
59 V8::F0, V8::F2, V8::F4, V8::F6, V8::F8, V8::F10, V8::F12, V8::F14,
60 V8::F16, V8::F18, V8::F20, V8::F22, V8::F24, V8::F26, V8::F28, V8::F30
62 const unsigned OddHalvesOfPairs[] = {
63 V8::F1, V8::F3, V8::F5, V8::F7, V8::F9, V8::F11, V8::F13, V8::F15,
64 V8::F17, V8::F19, V8::F21, V8::F23, V8::F25, V8::F27, V8::F29, V8::F31
66 const unsigned DoubleRegsInOrder[] = {
67 V8::D0, V8::D1, V8::D2, V8::D3, V8::D4, V8::D5, V8::D6, V8::D7, V8::D8,
68 V8::D9, V8::D10, V8::D11, V8::D12, V8::D13, V8::D14, V8::D15
70 for (unsigned i = 0; i < sizeof(DoubleRegsInOrder)/sizeof(unsigned); ++i)
71 if (DoubleRegsInOrder[i] == doubleReg) {
72 singleReg1 = EvenHalvesOfPairs[i];
73 singleReg2 = OddHalvesOfPairs[i];
76 assert (0 && "Can't find reg");
79 /// runOnMachineBasicBlock - Fixup FpMOVD instructions in this MBB.
81 bool FPMover::runOnMachineBasicBlock (MachineBasicBlock &MBB) {
83 for (MachineBasicBlock::iterator I = MBB.begin (); I != MBB.end (); ++I)
84 if (V8::FpMOVD == I->getOpcode ()) {
85 unsigned NewSrcReg0, NewSrcReg1, NewDestReg0, NewDestReg1;
86 doubleToSingleRegPair (I->getOperand (0).getReg (), NewDestReg0,
88 doubleToSingleRegPair (I->getOperand (1).getReg (), NewSrcReg0,
90 MachineBasicBlock::iterator J = I;
92 if (!(NewDestReg0 == NewSrcReg0 && NewDestReg1 == NewSrcReg1)) {
93 I->setOpcode (V8::FMOVS);
94 I->SetMachineOperandReg (0, NewDestReg0);
95 I->SetMachineOperandReg (1, NewSrcReg0);
96 DEBUG (std::cerr << "FPMover: new dest reg. is: " << NewDestReg0
97 << "; modified instr is: " << *I);
98 // Insert copy for the other half of the double:
100 BuildMI (MBB, J, V8::FMOVS, 1, NewDestReg1).addReg (NewSrcReg1);
101 DEBUG (std::cerr << "FPMover: new dest reg. is " << NewDestReg1
102 << "; inserted instr is: " << *MI2);