1 //===-- FPMover.cpp - Sparc double-precision floating point move fixer ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Expand FpMOVD/FpABSD/FpNEGD instructions into their single-precision pieces.
12 //===----------------------------------------------------------------------===//
15 #include "SparcSubtarget.h"
16 #include "llvm/CodeGen/MachineFunctionPass.h"
17 #include "llvm/CodeGen/MachineInstrBuilder.h"
18 #include "llvm/Target/TargetMachine.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/Support/Debug.h"
25 Statistic<> NumFpDs("fpmover", "Number of instructions translated");
26 Statistic<> NoopFpDs("fpmover", "Number of noop instructions removed");
28 struct FPMover : public MachineFunctionPass {
29 /// Target machine description which we query for reg. names, data
34 FPMover(TargetMachine &tm) : TM(tm) { }
36 virtual const char *getPassName() const {
37 return "Sparc Double-FP Move Fixer";
40 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
41 bool runOnMachineFunction(MachineFunction &F);
43 } // end of anonymous namespace
45 /// createSparcFPMoverPass - Returns a pass that turns FpMOVD
46 /// instructions into FMOVS instructions
48 FunctionPass *llvm::createSparcFPMoverPass(TargetMachine &tm) {
49 return new FPMover(tm);
52 /// getDoubleRegPair - Given a DFP register, return the even and odd FP
53 /// registers that correspond to it.
54 static void getDoubleRegPair(unsigned DoubleReg, unsigned &EvenReg,
56 static const unsigned EvenHalvesOfPairs[] = {
57 SP::F0, SP::F2, SP::F4, SP::F6, SP::F8, SP::F10, SP::F12, SP::F14,
58 SP::F16, SP::F18, SP::F20, SP::F22, SP::F24, SP::F26, SP::F28, SP::F30
60 static const unsigned OddHalvesOfPairs[] = {
61 SP::F1, SP::F3, SP::F5, SP::F7, SP::F9, SP::F11, SP::F13, SP::F15,
62 SP::F17, SP::F19, SP::F21, SP::F23, SP::F25, SP::F27, SP::F29, SP::F31
64 static const unsigned DoubleRegsInOrder[] = {
65 SP::D0, SP::D1, SP::D2, SP::D3, SP::D4, SP::D5, SP::D6, SP::D7, SP::D8,
66 SP::D9, SP::D10, SP::D11, SP::D12, SP::D13, SP::D14, SP::D15
68 for (unsigned i = 0; i < sizeof(DoubleRegsInOrder)/sizeof(unsigned); ++i)
69 if (DoubleRegsInOrder[i] == DoubleReg) {
70 EvenReg = EvenHalvesOfPairs[i];
71 OddReg = OddHalvesOfPairs[i];
74 assert(0 && "Can't find reg");
77 /// runOnMachineBasicBlock - Fixup FpMOVD instructions in this MBB.
79 bool FPMover::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
81 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) {
82 MachineInstr *MI = I++;
83 if (MI->getOpcode() == SP::FpMOVD || MI->getOpcode() == SP::FpABSD ||
84 MI->getOpcode() == SP::FpNEGD) {
86 unsigned DestDReg = MI->getOperand(0).getReg();
87 unsigned SrcDReg = MI->getOperand(1).getReg();
88 if (DestDReg == SrcDReg && MI->getOpcode() == SP::FpMOVD) {
89 MBB.erase(MI); // Eliminate the noop copy.
94 unsigned EvenSrcReg = 0, OddSrcReg = 0, EvenDestReg = 0, OddDestReg = 0;
95 getDoubleRegPair(DestDReg, EvenDestReg, OddDestReg);
96 getDoubleRegPair(SrcDReg, EvenSrcReg, OddSrcReg);
98 if (MI->getOpcode() == SP::FpMOVD)
99 MI->setOpcode(SP::FMOVS);
100 else if (MI->getOpcode() == SP::FpNEGD)
101 MI->setOpcode(SP::FNEGS);
102 else if (MI->getOpcode() == SP::FpABSD)
103 MI->setOpcode(SP::FABSS);
105 assert(0 && "Unknown opcode!");
107 MI->getOperand(0).setReg(EvenDestReg);
108 MI->getOperand(1).setReg(EvenSrcReg);
109 DEBUG(std::cerr << "FPMover: the modified instr is: " << *MI);
110 // Insert copy for the other half of the double.
111 if (DestDReg != SrcDReg) {
112 MI = BuildMI(MBB, I, SP::FMOVS, 1, OddDestReg).addReg(OddSrcReg);
113 DEBUG(std::cerr << "FPMover: the inserted instr is: " << *MI);
121 bool FPMover::runOnMachineFunction(MachineFunction &F) {
122 // If the target has V9 instructions, the fp-mover pseudos will never be
123 // emitted. Avoid a scan of the instructions to improve compile time.
124 if (TM.getSubtarget<SparcSubtarget>().isV9())
127 bool Changed = false;
128 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
130 Changed |= runOnMachineBasicBlock(*FI);