1 //===-- SparcInstPrinter.cpp - Convert Sparc MCInst to assembly syntax -----==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an Sparc MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "asm-printer"
15 #include "SparcInstPrinter.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCInst.h"
19 #include "llvm/MC/MCSymbol.h"
20 #include "llvm/Support/raw_ostream.h"
23 #define GET_INSTRUCTION_NAME
24 #define PRINT_ALIAS_INSTR
25 #include "SparcGenAsmWriter.inc"
27 void SparcInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const
29 OS << '%' << StringRef(getRegisterName(RegNo)).lower();
32 void SparcInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
35 if (!printAliasInstr(MI, O) && !printSparcAliasInstr(MI, O))
36 printInstruction(MI, O);
37 printAnnotation(O, Annot);
40 bool SparcInstPrinter::printSparcAliasInstr(const MCInst *MI, raw_ostream &O)
42 switch (MI->getOpcode()) {
43 default: return false;
46 if (MI->getNumOperands() != 3)
48 if (!MI->getOperand(0).isReg())
50 switch (MI->getOperand(0).getReg()) {
51 default: return false;
52 case SP::G0: // jmp $addr
53 O << "\tjmp "; printMemOperand(MI, 1, O);
55 case SP::O7: // call $addr
56 O << "\tcall "; printMemOperand(MI, 1, O);
63 void SparcInstPrinter::printOperand(const MCInst *MI, int opNum,
66 const MCOperand &MO = MI->getOperand (opNum);
69 printRegName(O, MO.getReg());
74 O << (int)MO.getImm();
78 assert(MO.isExpr() && "Unknown operand kind in printOperand");
79 MO.getExpr()->print(O);
82 void SparcInstPrinter::printMemOperand(const MCInst *MI, int opNum,
83 raw_ostream &O, const char *Modifier)
85 printOperand(MI, opNum, O);
87 // If this is an ADD operand, emit it like normal operands.
88 if (Modifier && !strcmp(Modifier, "arith")) {
90 printOperand(MI, opNum+1, O);
93 const MCOperand &MO = MI->getOperand(opNum+1);
95 if (MO.isReg() && MO.getReg() == SP::G0)
96 return; // don't print "+%g0"
97 if (MO.isImm() && MO.getImm() == 0)
98 return; // don't print "+0"
102 printOperand(MI, opNum+1, O);
105 void SparcInstPrinter::printCCOperand(const MCInst *MI, int opNum,
108 int CC = (int)MI->getOperand(opNum).getImm();
109 switch (MI->getOpcode()) {
116 case SP::FMOVQ_FCC: // Make sure CC is a fp conditional flag.
117 CC = (CC < 16) ? (CC + 16) : CC;
120 O << SPARCCondCodeToString((SPCC::CondCodes)CC);
123 bool SparcInstPrinter::printGetPCX(const MCInst *MI, unsigned opNum,
126 assert(0 && "FIXME: Implement SparcInstPrinter::printGetPCX.");