1 //===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
14 // Target-independent interfaces which we are implementing
15 //===----------------------------------------------------------------------===//
17 include "llvm/Target/Target.td"
19 //===----------------------------------------------------------------------===//
20 // SPARC Subtarget features.
24 : SubtargetFeature<"v9", "IsV9", "true",
25 "Enable SPARC-V9 instructions">;
26 def FeatureV8Deprecated
27 : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true",
28 "Enable deprecated V8 instructions in V9 mode">;
30 : SubtargetFeature<"vis", "IsVIS", "true",
31 "Enable UltraSPARC Visual Instruction Set extensions">;
34 : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true",
35 "Enable quad-word floating point instructions">;
37 //===----------------------------------------------------------------------===//
38 // Register File, Calling Conv, Instruction Descriptions
39 //===----------------------------------------------------------------------===//
41 include "SparcRegisterInfo.td"
42 include "SparcCallingConv.td"
43 include "SparcInstrInfo.td"
45 def SparcInstrInfo : InstrInfo;
47 def SparcAsmParser : AsmParser {
48 bit ShouldEmitMatchRegisterName = 0;
51 //===----------------------------------------------------------------------===//
52 // SPARC processors supported.
53 //===----------------------------------------------------------------------===//
55 class Proc<string Name, list<SubtargetFeature> Features>
56 : Processor<Name, NoItineraries, Features>;
58 def : Proc<"generic", []>;
61 def : Proc<"supersparc", []>;
62 def : Proc<"sparclite", []>;
63 def : Proc<"f934", []>;
64 def : Proc<"hypersparc", []>;
65 def : Proc<"sparclite86x", []>;
66 def : Proc<"sparclet", []>;
67 def : Proc<"tsc701", []>;
68 def : Proc<"v9", [FeatureV9]>;
69 def : Proc<"ultrasparc", [FeatureV9, FeatureV8Deprecated]>;
70 def : Proc<"ultrasparc3", [FeatureV9, FeatureV8Deprecated]>;
71 def : Proc<"niagara", [FeatureV9, FeatureV8Deprecated]>;
72 def : Proc<"niagara2", [FeatureV9, FeatureV8Deprecated]>;
73 def : Proc<"niagara3", [FeatureV9, FeatureV8Deprecated]>;
74 def : Proc<"niagara4", [FeatureV9, FeatureV8Deprecated]>;
77 //===----------------------------------------------------------------------===//
78 // Declare the target which we are implementing
79 //===----------------------------------------------------------------------===//
82 // Pull in Instruction Info:
83 let InstructionSet = SparcInstrInfo;
84 let AssemblyParsers = [SparcAsmParser];