1 //===-- SparcAsmPrinter.cpp - Sparc LLVM assembly writer ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format SPARC assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "SparcInstrInfo.h"
18 #include "SparcTargetMachine.h"
19 #include "llvm/CodeGen/AsmPrinter.h"
20 #include "llvm/CodeGen/MachineInstr.h"
21 #include "llvm/MC/MCAsmInfo.h"
22 #include "llvm/MC/MCStreamer.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Target/Mangler.h"
25 #include "llvm/ADT/SmallString.h"
26 #include "llvm/Support/TargetRegistry.h"
27 #include "llvm/Support/raw_ostream.h"
31 class SparcAsmPrinter : public AsmPrinter {
33 explicit SparcAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
34 : AsmPrinter(TM, Streamer) {}
36 virtual const char *getPassName() const {
37 return "Sparc Assembly Printer";
40 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
41 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS,
42 const char *Modifier = 0);
43 void printCCOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
45 virtual void EmitInstruction(const MachineInstr *MI) {
47 raw_svector_ostream OS(Str);
48 printInstruction(MI, OS);
49 OutStreamer.EmitRawText(OS.str());
51 void printInstruction(const MachineInstr *MI, raw_ostream &OS);// autogen'd.
52 static const char *getRegisterName(unsigned RegNo);
54 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
55 unsigned AsmVariant, const char *ExtraCode,
57 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
58 unsigned AsmVariant, const char *ExtraCode,
61 bool printGetPCX(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS);
63 virtual bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB)
66 virtual MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
68 } // end of anonymous namespace
70 #include "SparcGenAsmWriter.inc"
72 void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
74 const MachineOperand &MO = MI->getOperand (opNum);
75 bool CloseParen = false;
76 if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
79 } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
80 !MO.isReg() && !MO.isImm()) {
84 switch (MO.getType()) {
85 case MachineOperand::MO_Register:
86 O << "%" << StringRef(getRegisterName(MO.getReg())).lower();
89 case MachineOperand::MO_Immediate:
90 O << (int)MO.getImm();
92 case MachineOperand::MO_MachineBasicBlock:
93 O << *MO.getMBB()->getSymbol();
95 case MachineOperand::MO_GlobalAddress:
96 O << *Mang->getSymbol(MO.getGlobal());
98 case MachineOperand::MO_ExternalSymbol:
99 O << MO.getSymbolName();
101 case MachineOperand::MO_ConstantPoolIndex:
102 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
106 llvm_unreachable("<unknown operand type>");
108 if (CloseParen) O << ")";
111 void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
112 raw_ostream &O, const char *Modifier) {
113 printOperand(MI, opNum, O);
115 // If this is an ADD operand, emit it like normal operands.
116 if (Modifier && !strcmp(Modifier, "arith")) {
118 printOperand(MI, opNum+1, O);
122 if (MI->getOperand(opNum+1).isReg() &&
123 MI->getOperand(opNum+1).getReg() == SP::G0)
124 return; // don't print "+%g0"
125 if (MI->getOperand(opNum+1).isImm() &&
126 MI->getOperand(opNum+1).getImm() == 0)
127 return; // don't print "+0"
130 if (MI->getOperand(opNum+1).isGlobal() ||
131 MI->getOperand(opNum+1).isCPI()) {
133 printOperand(MI, opNum+1, O);
136 printOperand(MI, opNum+1, O);
140 bool SparcAsmPrinter::printGetPCX(const MachineInstr *MI, unsigned opNum,
142 std::string operand = "";
143 const MachineOperand &MO = MI->getOperand(opNum);
144 switch (MO.getType()) {
145 default: assert(0 && "Operand is not a register ");
146 case MachineOperand::MO_Register:
147 assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
148 "Operand is not a physical register ");
149 assert(MO.getReg() != SP::O7 &&
150 "%o7 is assigned as destination for getpcx!");
151 operand = "%" + StringRef(getRegisterName(MO.getReg())).lower();
155 unsigned mfNum = MI->getParent()->getParent()->getFunctionNumber();
156 unsigned bbNum = MI->getParent()->getNumber();
158 O << '\n' << ".LLGETPCH" << mfNum << '_' << bbNum << ":\n";
159 O << "\tcall\t.LLGETPC" << mfNum << '_' << bbNum << '\n' ;
162 << "%hi(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum
163 << ")), " << operand << '\n' ;
165 O << ".LLGETPC" << mfNum << '_' << bbNum << ":\n" ;
166 O << "\tor\t" << operand
167 << ", %lo(_GLOBAL_OFFSET_TABLE_+(.-.LLGETPCH" << mfNum << '_' << bbNum
168 << ")), " << operand << '\n';
169 O << "\tadd\t" << operand << ", %o7, " << operand << '\n';
174 void SparcAsmPrinter::printCCOperand(const MachineInstr *MI, int opNum,
176 int CC = (int)MI->getOperand(opNum).getImm();
177 O << SPARCCondCodeToString((SPCC::CondCodes)CC);
180 /// PrintAsmOperand - Print out an operand for an inline asm expression.
182 bool SparcAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
184 const char *ExtraCode,
186 if (ExtraCode && ExtraCode[0]) {
187 if (ExtraCode[1] != 0) return true; // Unknown modifier.
189 switch (ExtraCode[0]) {
190 default: return true; // Unknown modifier.
196 printOperand(MI, OpNo, O);
201 bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
202 unsigned OpNo, unsigned AsmVariant,
203 const char *ExtraCode,
205 if (ExtraCode && ExtraCode[0])
206 return true; // Unknown modifier
209 printMemOperand(MI, OpNo, O);
215 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
216 /// exactly one predecessor and the control transfer mechanism between
217 /// the predecessor and this block is a fall-through.
219 /// This overrides AsmPrinter's implementation to handle delay slots.
220 bool SparcAsmPrinter::
221 isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
222 // If this is a landing pad, it isn't a fall through. If it has no preds,
223 // then nothing falls through to it.
224 if (MBB->isLandingPad() || MBB->pred_empty())
227 // If there isn't exactly one predecessor, it can't be a fall through.
228 MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI;
230 if (PI2 != MBB->pred_end())
233 // The predecessor has to be immediately before this block.
234 const MachineBasicBlock *Pred = *PI;
236 if (!Pred->isLayoutSuccessor(MBB))
239 // Check if the last terminator is an unconditional branch.
240 MachineBasicBlock::const_iterator I = Pred->end();
241 while (I != Pred->begin() && !(--I)->isTerminator())
243 return I == Pred->end() || !I->isBarrier();
246 MachineLocation SparcAsmPrinter::
247 getDebugValueLocation(const MachineInstr *MI) const {
248 assert(MI->getNumOperands() == 4 && "Invalid number of operands!");
249 assert(MI->getOperand(0).isReg() && MI->getOperand(1).isImm() &&
250 "Unexpected MachineOperand types");
251 return MachineLocation(MI->getOperand(0).getReg(),
252 MI->getOperand(1).getImm());
255 // Force static initialization.
256 extern "C" void LLVMInitializeSparcAsmPrinter() {
257 RegisterAsmPrinter<SparcAsmPrinter> X(TheSparcTarget);
258 RegisterAsmPrinter<SparcAsmPrinter> Y(TheSparcV9Target);