1 //===-- Sparc/SparcCodeEmitter.cpp - Convert Sparc Code to Machine Code ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Sparc machine instructions
11 // into relocatable machine code.
13 //===---------------------------------------------------------------------===//
16 #include "MCTargetDesc/SparcMCExpr.h"
17 #include "SparcRelocations.h"
18 #include "SparcTargetMachine.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/JITCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineModuleInfo.h"
23 #include "llvm/Support/Debug.h"
27 #define DEBUG_TYPE "jit"
29 STATISTIC(NumEmitted, "Number of machine instructions emitted");
33 class SparcCodeEmitter : public MachineFunctionPass {
35 const SparcInstrInfo *II;
37 const SparcSubtarget *Subtarget;
40 const std::vector<MachineConstantPoolEntry> *MCPEs;
43 void getAnalysisUsage(AnalysisUsage &AU) const override {
44 AU.addRequired<MachineModuleInfo> ();
45 MachineFunctionPass::getAnalysisUsage(AU);
51 SparcCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
52 : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr),
53 TM(tm), MCE(mce), MCPEs(nullptr),
54 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
56 bool runOnMachineFunction(MachineFunction &MF) override;
58 const char *getPassName() const override {
59 return "Sparc Machine Code Emitter";
62 /// getBinaryCodeForInstr - This function, generated by the
63 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
64 /// machine instructions.
65 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
67 void emitInstruction(MachineBasicBlock::instr_iterator MI,
68 MachineBasicBlock &MBB);
71 /// getMachineOpValue - Return binary encoding of operand. If the machine
72 /// operand requires relocation, record the relocation and return zero.
73 unsigned getMachineOpValue(const MachineInstr &MI,
74 const MachineOperand &MO) const;
76 unsigned getCallTargetOpValue(const MachineInstr &MI,
78 unsigned getBranchTargetOpValue(const MachineInstr &MI,
80 unsigned getBranchPredTargetOpValue(const MachineInstr &MI,
82 unsigned getBranchOnRegTargetOpValue(const MachineInstr &MI,
85 void emitWord(unsigned Word);
87 unsigned getRelocation(const MachineInstr &MI,
88 const MachineOperand &MO) const;
90 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc) const;
91 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
92 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
93 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
95 } // end anonymous namespace.
97 char SparcCodeEmitter::ID = 0;
99 bool SparcCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
100 SparcTargetMachine &Target = static_cast<SparcTargetMachine &>(
101 const_cast<TargetMachine &>(MF.getTarget()));
103 JTI = Target.getJITInfo();
104 II = Target.getInstrInfo();
105 TD = Target.getDataLayout();
106 Subtarget = &TM.getSubtarget<SparcSubtarget> ();
107 MCPEs = &MF.getConstantPool()->getConstants();
108 JTI->Initialize(MF, IsPIC);
109 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
112 DEBUG(errs() << "JITTing function '"
113 << MF.getName() << "'\n");
114 MCE.startFunction(MF);
116 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
118 MCE.StartMachineBasicBlock(MBB);
119 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
120 E = MBB->instr_end(); I != E;)
121 emitInstruction(*I++, *MBB);
123 } while (MCE.finishFunction(MF));
128 void SparcCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
129 MachineBasicBlock &MBB) {
130 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
132 MCE.processDebugLoc(MI->getDebugLoc(), true);
136 switch (MI->getOpcode()) {
138 emitWord(getBinaryCodeForInstr(*MI));
141 case TargetOpcode::INLINEASM: {
142 // We allow inline assembler nodes with empty bodies - they can
143 // implicitly define registers, which is ok for JIT.
144 if (MI->getOperand(0).getSymbolName()[0]) {
145 report_fatal_error("JIT does not support inline asm!");
149 case TargetOpcode::CFI_INSTRUCTION:
151 case TargetOpcode::EH_LABEL: {
152 MCE.emitLabel(MI->getOperand(0).getMCSymbol());
155 case TargetOpcode::IMPLICIT_DEF:
156 case TargetOpcode::KILL: {
161 report_fatal_error("JIT does not support pseudo instruction GETPCX yet!");
166 MCE.processDebugLoc(MI->getDebugLoc(), false);
169 void SparcCodeEmitter::emitWord(unsigned Word) {
170 DEBUG(errs() << " 0x";
171 errs().write_hex(Word) << "\n");
172 MCE.emitWordBE(Word);
175 /// getMachineOpValue - Return binary encoding of operand. If the machine
176 /// operand requires relocation, record the relocation and return zero.
177 unsigned SparcCodeEmitter::getMachineOpValue(const MachineInstr &MI,
178 const MachineOperand &MO) const {
180 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
182 return static_cast<unsigned>(MO.getImm());
183 else if (MO.isGlobal())
184 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO));
185 else if (MO.isSymbol())
186 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
188 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
190 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
192 llvm_unreachable("Unable to encode MachineOperand!");
195 unsigned SparcCodeEmitter::getCallTargetOpValue(const MachineInstr &MI,
196 unsigned opIdx) const {
197 const MachineOperand MO = MI.getOperand(opIdx);
198 return getMachineOpValue(MI, MO);
201 unsigned SparcCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
202 unsigned opIdx) const {
203 const MachineOperand MO = MI.getOperand(opIdx);
204 return getMachineOpValue(MI, MO);
207 unsigned SparcCodeEmitter::getBranchPredTargetOpValue(const MachineInstr &MI,
208 unsigned opIdx) const {
209 const MachineOperand MO = MI.getOperand(opIdx);
210 return getMachineOpValue(MI, MO);
213 unsigned SparcCodeEmitter::getBranchOnRegTargetOpValue(const MachineInstr &MI,
214 unsigned opIdx) const {
215 const MachineOperand MO = MI.getOperand(opIdx);
216 return getMachineOpValue(MI, MO);
219 unsigned SparcCodeEmitter::getRelocation(const MachineInstr &MI,
220 const MachineOperand &MO) const {
222 unsigned TF = MO.getTargetFlags();
225 case SparcMCExpr::VK_Sparc_None: break;
226 case SparcMCExpr::VK_Sparc_LO: return SP::reloc_sparc_lo;
227 case SparcMCExpr::VK_Sparc_HI: return SP::reloc_sparc_hi;
228 case SparcMCExpr::VK_Sparc_H44: return SP::reloc_sparc_h44;
229 case SparcMCExpr::VK_Sparc_M44: return SP::reloc_sparc_m44;
230 case SparcMCExpr::VK_Sparc_L44: return SP::reloc_sparc_l44;
231 case SparcMCExpr::VK_Sparc_HH: return SP::reloc_sparc_hh;
232 case SparcMCExpr::VK_Sparc_HM: return SP::reloc_sparc_hm;
235 unsigned Opc = MI.getOpcode();
238 case SP::CALL: return SP::reloc_sparc_pc30;
241 case SP::FBCOND: return SP::reloc_sparc_pc22;
242 case SP::BPXCC: return SP::reloc_sparc_pc19;
244 llvm_unreachable("unknown reloc!");
247 void SparcCodeEmitter::emitGlobalAddress(const GlobalValue *GV,
248 unsigned Reloc) const {
249 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
250 const_cast<GlobalValue *>(GV), 0,
254 void SparcCodeEmitter::
255 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
256 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
260 void SparcCodeEmitter::
261 emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
262 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
263 Reloc, CPI, 0, false));
266 void SparcCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
267 unsigned Reloc) const {
268 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
273 /// createSparcJITCodeEmitterPass - Return a pass that emits the collected Sparc
274 /// code to the specified MCE object.
275 FunctionPass *llvm::createSparcJITCodeEmitterPass(SparcTargetMachine &TM,
276 JITCodeEmitter &JCE) {
277 return new SparcCodeEmitter(TM, JCE);
280 #include "SparcGenCodeEmitter.inc"