1 //===-- Sparc/SparcCodeEmitter.cpp - Convert Sparc Code to Machine Code ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Sparc machine instructions
11 // into relocatable machine code.
13 //===---------------------------------------------------------------------===//
15 #define DEBUG_TYPE "jit"
17 #include "MCTargetDesc/SparcMCExpr.h"
18 #include "SparcRelocations.h"
19 #include "SparcTargetMachine.h"
20 #include "llvm/ADT/Statistic.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/Support/Debug.h"
28 STATISTIC(NumEmitted, "Number of machine instructions emitted");
32 class SparcCodeEmitter : public MachineFunctionPass {
34 const SparcInstrInfo *II;
36 const SparcSubtarget *Subtarget;
39 const std::vector<MachineConstantPoolEntry> *MCPEs;
42 void getAnalysisUsage(AnalysisUsage &AU) const {
43 AU.addRequired<MachineModuleInfo> ();
44 MachineFunctionPass::getAnalysisUsage(AU);
50 SparcCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
51 : MachineFunctionPass(ID), JTI(0), II(0), TD(0),
52 TM(tm), MCE(mce), MCPEs(0),
53 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
55 bool runOnMachineFunction(MachineFunction &MF);
57 virtual const char *getPassName() const {
58 return "Sparc Machine Code Emitter";
61 /// getBinaryCodeForInstr - This function, generated by the
62 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
63 /// machine instructions.
64 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
66 void emitInstruction(MachineBasicBlock::instr_iterator MI,
67 MachineBasicBlock &MBB);
70 /// getMachineOpValue - Return binary encoding of operand. If the machine
71 /// operand requires relocation, record the relocation and return zero.
72 unsigned getMachineOpValue(const MachineInstr &MI,
73 const MachineOperand &MO) const;
75 unsigned getCallTargetOpValue(const MachineInstr &MI,
77 unsigned getBranchTargetOpValue(const MachineInstr &MI,
79 unsigned getBranchPredTargetOpValue(const MachineInstr &MI,
81 unsigned getBranchOnRegTargetOpValue(const MachineInstr &MI,
84 void emitWord(unsigned Word);
86 unsigned getRelocation(const MachineInstr &MI,
87 const MachineOperand &MO) const;
89 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc) const;
90 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
91 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
92 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
94 } // end anonymous namespace.
96 char SparcCodeEmitter::ID = 0;
98 bool SparcCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
99 SparcTargetMachine &Target = static_cast<SparcTargetMachine &>(
100 const_cast<TargetMachine &>(MF.getTarget()));
102 JTI = Target.getJITInfo();
103 II = Target.getInstrInfo();
104 TD = Target.getDataLayout();
105 Subtarget = &TM.getSubtarget<SparcSubtarget> ();
106 MCPEs = &MF.getConstantPool()->getConstants();
107 JTI->Initialize(MF, IsPIC);
108 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
111 DEBUG(errs() << "JITTing function '"
112 << MF.getName() << "'\n");
113 MCE.startFunction(MF);
115 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
117 MCE.StartMachineBasicBlock(MBB);
118 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
119 E = MBB->instr_end(); I != E;)
120 emitInstruction(*I++, *MBB);
122 } while (MCE.finishFunction(MF));
127 void SparcCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
128 MachineBasicBlock &MBB) {
129 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
131 MCE.processDebugLoc(MI->getDebugLoc(), true);
135 switch (MI->getOpcode()) {
137 emitWord(getBinaryCodeForInstr(*MI));
140 case TargetOpcode::INLINEASM: {
141 // We allow inline assembler nodes with empty bodies - they can
142 // implicitly define registers, which is ok for JIT.
143 if (MI->getOperand(0).getSymbolName()[0]) {
144 report_fatal_error("JIT does not support inline asm!");
148 case TargetOpcode::CFI_INSTRUCTION:
150 case TargetOpcode::EH_LABEL: {
151 MCE.emitLabel(MI->getOperand(0).getMCSymbol());
154 case TargetOpcode::IMPLICIT_DEF:
155 case TargetOpcode::KILL: {
160 report_fatal_error("JIT does not support pseudo instruction GETPCX yet!");
165 MCE.processDebugLoc(MI->getDebugLoc(), false);
168 void SparcCodeEmitter::emitWord(unsigned Word) {
169 DEBUG(errs() << " 0x";
170 errs().write_hex(Word) << "\n");
171 MCE.emitWordBE(Word);
174 /// getMachineOpValue - Return binary encoding of operand. If the machine
175 /// operand requires relocation, record the relocation and return zero.
176 unsigned SparcCodeEmitter::getMachineOpValue(const MachineInstr &MI,
177 const MachineOperand &MO) const {
179 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
181 return static_cast<unsigned>(MO.getImm());
182 else if (MO.isGlobal())
183 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO));
184 else if (MO.isSymbol())
185 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
187 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
189 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
191 llvm_unreachable("Unable to encode MachineOperand!");
194 unsigned SparcCodeEmitter::getCallTargetOpValue(const MachineInstr &MI,
195 unsigned opIdx) const {
196 const MachineOperand MO = MI.getOperand(opIdx);
197 return getMachineOpValue(MI, MO);
200 unsigned SparcCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
201 unsigned opIdx) const {
202 const MachineOperand MO = MI.getOperand(opIdx);
203 return getMachineOpValue(MI, MO);
206 unsigned SparcCodeEmitter::getBranchPredTargetOpValue(const MachineInstr &MI,
207 unsigned opIdx) const {
208 const MachineOperand MO = MI.getOperand(opIdx);
209 return getMachineOpValue(MI, MO);
212 unsigned SparcCodeEmitter::getBranchOnRegTargetOpValue(const MachineInstr &MI,
213 unsigned opIdx) const {
214 const MachineOperand MO = MI.getOperand(opIdx);
215 return getMachineOpValue(MI, MO);
218 unsigned SparcCodeEmitter::getRelocation(const MachineInstr &MI,
219 const MachineOperand &MO) const {
221 unsigned TF = MO.getTargetFlags();
224 case SparcMCExpr::VK_Sparc_None: break;
225 case SparcMCExpr::VK_Sparc_LO: return SP::reloc_sparc_lo;
226 case SparcMCExpr::VK_Sparc_HI: return SP::reloc_sparc_hi;
227 case SparcMCExpr::VK_Sparc_H44: return SP::reloc_sparc_h44;
228 case SparcMCExpr::VK_Sparc_M44: return SP::reloc_sparc_m44;
229 case SparcMCExpr::VK_Sparc_L44: return SP::reloc_sparc_l44;
230 case SparcMCExpr::VK_Sparc_HH: return SP::reloc_sparc_hh;
231 case SparcMCExpr::VK_Sparc_HM: return SP::reloc_sparc_hm;
234 unsigned Opc = MI.getOpcode();
237 case SP::CALL: return SP::reloc_sparc_pc30;
240 case SP::FBCOND: return SP::reloc_sparc_pc22;
241 case SP::BPXCC: return SP::reloc_sparc_pc19;
243 llvm_unreachable("unknown reloc!");
246 void SparcCodeEmitter::emitGlobalAddress(const GlobalValue *GV,
247 unsigned Reloc) const {
248 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
249 const_cast<GlobalValue *>(GV), 0,
253 void SparcCodeEmitter::
254 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
255 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
259 void SparcCodeEmitter::
260 emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
261 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
262 Reloc, CPI, 0, false));
265 void SparcCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
266 unsigned Reloc) const {
267 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
272 /// createSparcJITCodeEmitterPass - Return a pass that emits the collected Sparc
273 /// code to the specified MCE object.
274 FunctionPass *llvm::createSparcJITCodeEmitterPass(SparcTargetMachine &TM,
275 JITCodeEmitter &JCE) {
276 return new SparcCodeEmitter(TM, JCE);
279 #include "SparcGenCodeEmitter.inc"