1 //===-- SparcFrameLowering.cpp - Sparc Frame Information ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Sparc implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "SparcFrameLowering.h"
15 #include "SparcInstrInfo.h"
16 #include "SparcMachineFunctionInfo.h"
17 #include "SparcSubtarget.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineModuleInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/IR/Function.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Target/TargetOptions.h"
31 DisableLeafProc("disable-sparc-leaf-proc",
33 cl::desc("Disable Sparc leaf procedure optimization."),
36 SparcFrameLowering::SparcFrameLowering(const SparcSubtarget &ST)
37 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
38 ST.is64Bit() ? 16 : 8, 0, ST.is64Bit() ? 16 : 8) {}
40 void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
41 MachineBasicBlock &MBB,
42 MachineBasicBlock::iterator MBBI,
45 unsigned ADDri) const {
47 DebugLoc dl = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
48 const SparcInstrInfo &TII =
49 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
51 if (NumBytes >= -4096 && NumBytes < 4096) {
52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
53 .addReg(SP::O6).addImm(NumBytes);
57 // Emit this the hard way. This clobbers G1 which we always know is
60 // Emit nonnegative numbers with sethi + or.
61 // sethi %hi(NumBytes), %g1
62 // or %g1, %lo(NumBytes), %g1
64 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
65 .addImm(HI22(NumBytes));
66 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
67 .addReg(SP::G1).addImm(LO10(NumBytes));
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
69 .addReg(SP::O6).addReg(SP::G1);
73 // Emit negative numbers with sethi + xor.
74 // sethi %hix(NumBytes), %g1
75 // xor %g1, %lox(NumBytes), %g1
77 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
78 .addImm(HIX22(NumBytes));
79 BuildMI(MBB, MBBI, dl, TII.get(SP::XORri), SP::G1)
80 .addReg(SP::G1).addImm(LOX10(NumBytes));
81 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6)
82 .addReg(SP::O6).addReg(SP::G1);
85 void SparcFrameLowering::emitPrologue(MachineFunction &MF,
86 MachineBasicBlock &MBB) const {
87 SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
89 assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
90 MachineFrameInfo *MFI = MF.getFrameInfo();
91 const SparcInstrInfo &TII =
92 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
93 MachineBasicBlock::iterator MBBI = MBB.begin();
94 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
96 // Get the number of bytes to allocate from the FrameInfo
97 int NumBytes = (int) MFI->getStackSize();
99 unsigned SAVEri = SP::SAVEri;
100 unsigned SAVErr = SP::SAVErr;
101 if (FuncInfo->isLeafProc()) {
107 NumBytes = -MF.getSubtarget<SparcSubtarget>().getAdjustedFrameSize(NumBytes);
108 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SAVErr, SAVEri);
110 MachineModuleInfo &MMI = MF.getMMI();
111 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
112 unsigned regFP = MRI->getDwarfRegNum(SP::I6, true);
114 // Emit ".cfi_def_cfa_register 30".
116 MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(nullptr, regFP));
117 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
118 .addCFIIndex(CFIIndex);
120 // Emit ".cfi_window_save".
121 CFIIndex = MMI.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
122 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
123 .addCFIIndex(CFIIndex);
125 unsigned regInRA = MRI->getDwarfRegNum(SP::I7, true);
126 unsigned regOutRA = MRI->getDwarfRegNum(SP::O7, true);
127 // Emit ".cfi_register 15, 31".
128 CFIIndex = MMI.addFrameInst(
129 MCCFIInstruction::createRegister(nullptr, regOutRA, regInRA));
130 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
131 .addCFIIndex(CFIIndex);
134 void SparcFrameLowering::
135 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
136 MachineBasicBlock::iterator I) const {
137 if (!hasReservedCallFrame(MF)) {
138 MachineInstr &MI = *I;
139 int Size = MI.getOperand(0).getImm();
140 if (MI.getOpcode() == SP::ADJCALLSTACKDOWN)
144 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri);
150 void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
151 MachineBasicBlock &MBB) const {
152 SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
153 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
154 const SparcInstrInfo &TII =
155 *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
156 DebugLoc dl = MBBI->getDebugLoc();
157 assert(MBBI->getOpcode() == SP::RETL &&
158 "Can only put epilog before 'retl' instruction!");
159 if (!FuncInfo->isLeafProc()) {
160 BuildMI(MBB, MBBI, dl, TII.get(SP::RESTORErr), SP::G0).addReg(SP::G0)
164 MachineFrameInfo *MFI = MF.getFrameInfo();
166 int NumBytes = (int) MFI->getStackSize();
170 NumBytes = MF.getSubtarget<SparcSubtarget>().getAdjustedFrameSize(NumBytes);
171 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri);
174 bool SparcFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
175 // Reserve call frame if there are no variable sized objects on the stack.
176 return !MF.getFrameInfo()->hasVarSizedObjects();
179 // hasFP - Return true if the specified function should have a dedicated frame
180 // pointer register. This is true if the function has variable sized allocas or
181 // if frame pointer elimination is disabled.
182 bool SparcFrameLowering::hasFP(const MachineFunction &MF) const {
183 const MachineFrameInfo *MFI = MF.getFrameInfo();
184 return MF.getTarget().Options.DisableFramePointerElim(MF) ||
185 MFI->hasVarSizedObjects() || MFI->isFrameAddressTaken();
189 static bool LLVM_ATTRIBUTE_UNUSED verifyLeafProcRegUse(MachineRegisterInfo *MRI)
192 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
193 if (!MRI->reg_nodbg_empty(reg))
196 for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
197 if (!MRI->reg_nodbg_empty(reg))
203 bool SparcFrameLowering::isLeafProc(MachineFunction &MF) const
206 MachineRegisterInfo &MRI = MF.getRegInfo();
207 MachineFrameInfo *MFI = MF.getFrameInfo();
209 return !(MFI->hasCalls() // has calls
210 || !MRI.reg_nodbg_empty(SP::L0) // Too many registers needed
211 || !MRI.reg_nodbg_empty(SP::O6) // %SP is used
212 || hasFP(MF)); // need %FP
215 void SparcFrameLowering::remapRegsForLeafProc(MachineFunction &MF) const {
216 MachineRegisterInfo &MRI = MF.getRegInfo();
217 // Remap %i[0-7] to %o[0-7].
218 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
219 if (MRI.reg_nodbg_empty(reg))
222 unsigned mapped_reg = reg - SP::I0 + SP::O0;
223 assert(MRI.reg_nodbg_empty(mapped_reg));
225 // Replace I register with O register.
226 MRI.replaceRegWith(reg, mapped_reg);
228 // Also replace register pair super-registers.
229 if ((reg - SP::I0) % 2 == 0) {
230 unsigned preg = (reg - SP::I0) / 2 + SP::I0_I1;
231 unsigned mapped_preg = preg - SP::I0_I1 + SP::O0_O1;
232 MRI.replaceRegWith(preg, mapped_preg);
236 // Rewrite MBB's Live-ins.
237 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
239 for (unsigned reg = SP::I0_I1; reg <= SP::I6_I7; ++reg) {
240 if (!MBB->isLiveIn(reg))
242 MBB->removeLiveIn(reg);
243 MBB->addLiveIn(reg - SP::I0_I1 + SP::O0_O1);
245 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg) {
246 if (!MBB->isLiveIn(reg))
248 MBB->removeLiveIn(reg);
249 MBB->addLiveIn(reg - SP::I0 + SP::O0);
253 assert(verifyLeafProcRegUse(&MRI));
255 MF.verify(0, "After LeafProc Remapping");
259 void SparcFrameLowering::determineCalleeSaves(MachineFunction &MF,
260 BitVector &SavedRegs,
261 RegScavenger *RS) const {
262 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
263 if (!DisableLeafProc && isLeafProc(MF)) {
264 SparcMachineFunctionInfo *MFI = MF.getInfo<SparcMachineFunctionInfo>();
265 MFI->setLeafProc(true);
267 remapRegsForLeafProc(MF);