1 //===-- SparcISelLowering.h - Sparc DAG Lowering Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that Sparc uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef SPARC_ISELLOWERING_H
16 #define SPARC_ISELLOWERING_H
18 #include "llvm/Target/TargetLowering.h"
24 FIRST_NUMBER = ISD::BUILTIN_OP_END+SP::INSTRUCTION_LIST_END,
25 CMPICC, // Compare two GPR operands, set icc.
26 CMPFCC, // Compare two FP operands, set fcc.
27 BRICC, // Branch to dest on icc condition
28 BRFCC, // Branch to dest on fcc condition
29 SELECT_ICC, // Select between two values using the current ICC flags.
30 SELECT_FCC, // Select between two values using the current FCC flags.
32 Hi, Lo, // Hi/Lo operations, typically on a global address.
34 FTOI, // FP to Int within a FP register.
35 ITOF, // Int to FP within a FP register.
37 CALL, // A call instruction.
38 RET_FLAG // Return with a flag operand.
42 class SparcTargetLowering : public TargetLowering {
43 int VarArgsFrameOffset; // Frame offset to start of varargs area.
45 SparcTargetLowering(TargetMachine &TM);
46 virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
48 int getVarArgsFrameOffset() const { return VarArgsFrameOffset; }
50 /// computeMaskedBitsForTargetNode - Determine which of the bits specified
51 /// in Mask are known to be either zero or one and return them in the
52 /// KnownZero/KnownOne bitsets.
53 virtual void computeMaskedBitsForTargetNode(const SDOperand Op,
57 const SelectionDAG &DAG,
58 unsigned Depth = 0) const;
60 virtual std::vector<SDOperand>
61 LowerArguments(Function &F, SelectionDAG &DAG);
62 virtual std::pair<SDOperand, SDOperand>
63 LowerCallTo(SDOperand Chain, const Type *RetTy,
64 bool RetSExt, bool RetZExt, bool isVarArg,
65 unsigned CC, bool isTailCall, SDOperand Callee,
66 ArgListTy &Args, SelectionDAG &DAG);
67 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
68 MachineBasicBlock *MBB);
70 virtual const char *getTargetNodeName(unsigned Opcode) const;
72 } // end namespace llvm
74 #endif // SPARC_ISELLOWERING_H