1 //===- SparcInstrInfo.h - Sparc Instruction Information ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Sparc implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef SPARCINSTRUCTIONINFO_H
15 #define SPARCINSTRUCTIONINFO_H
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "SparcRegisterInfo.h"
22 /// SPII - This namespace holds all of the target specific flags that
23 /// instruction info tracks.
34 class SparcInstrInfo : public TargetInstrInfoImpl {
35 const SparcRegisterInfo RI;
36 const SparcSubtarget& Subtarget;
38 SparcInstrInfo(SparcSubtarget &ST);
40 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
41 /// such, whenever a client has an instance of instruction info, it should
42 /// always be able to get register info as well (through this method).
44 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
46 /// Return true if the instruction is a register to register move and
47 /// leave the source and dest operands in the passed parameters.
49 virtual bool isMoveInstr(const MachineInstr &MI,
50 unsigned &SrcReg, unsigned &DstReg) const;
52 /// isLoadFromStackSlot - If the specified machine instruction is a direct
53 /// load from a stack slot, return the virtual or physical register number of
54 /// the destination along with the FrameIndex of the loaded stack slot. If
55 /// not, return 0. This predicate must return 0 if the instruction has
56 /// any side effects other than loading from the stack slot.
57 virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
59 /// isStoreToStackSlot - If the specified machine instruction is a direct
60 /// store to a stack slot, return the virtual or physical register number of
61 /// the source reg along with the FrameIndex of the loaded stack slot. If
62 /// not, return 0. This predicate must return 0 if the instruction has
63 /// any side effects other than storing to the stack slot.
64 virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
67 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
68 MachineBasicBlock *FBB,
69 const std::vector<MachineOperand> &Cond) const;
71 virtual void copyRegToReg(MachineBasicBlock &MBB,
72 MachineBasicBlock::iterator I,
73 unsigned DestReg, unsigned SrcReg,
74 const TargetRegisterClass *DestRC,
75 const TargetRegisterClass *SrcRC) const;
77 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
78 MachineBasicBlock::iterator MBBI,
79 unsigned SrcReg, bool isKill, int FrameIndex,
80 const TargetRegisterClass *RC) const;
82 virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
83 SmallVectorImpl<MachineOperand> &Addr,
84 const TargetRegisterClass *RC,
85 SmallVectorImpl<MachineInstr*> &NewMIs) const;
87 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
88 MachineBasicBlock::iterator MBBI,
89 unsigned DestReg, int FrameIndex,
90 const TargetRegisterClass *RC) const;
92 virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
93 SmallVectorImpl<MachineOperand> &Addr,
94 const TargetRegisterClass *RC,
95 SmallVectorImpl<MachineInstr*> &NewMIs) const;
97 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
98 SmallVectorImpl<unsigned> &Ops,
99 int FrameIndex) const;
101 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
102 SmallVectorImpl<unsigned> &Ops,
103 MachineInstr* LoadMI) const {