1 //===- SparcInstrInfo.h - Sparc Instruction Information ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Sparc implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef SPARCINSTRUCTIONINFO_H
15 #define SPARCINSTRUCTIONINFO_H
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "SparcRegisterInfo.h"
22 /// SPII - This namespace holds all of the target specific flags that
23 /// instruction info tracks.
34 class SparcInstrInfo : public TargetInstrInfo {
35 const SparcRegisterInfo RI;
37 SparcInstrInfo(SparcSubtarget &ST);
39 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
40 /// such, whenever a client has an instance of instruction info, it should
41 /// always be able to get register info as well (through this method).
43 virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
45 /// Return true if the instruction is a register to register move and
46 /// leave the source and dest operands in the passed parameters.
48 virtual bool isMoveInstr(const MachineInstr &MI,
49 unsigned &SrcReg, unsigned &DstReg) const;
51 /// isLoadFromStackSlot - If the specified machine instruction is a direct
52 /// load from a stack slot, return the virtual or physical register number of
53 /// the destination along with the FrameIndex of the loaded stack slot. If
54 /// not, return 0. This predicate must return 0 if the instruction has
55 /// any side effects other than loading from the stack slot.
56 virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
58 /// isStoreToStackSlot - If the specified machine instruction is a direct
59 /// store to a stack slot, return the virtual or physical register number of
60 /// the source reg along with the FrameIndex of the loaded stack slot. If
61 /// not, return 0. This predicate must return 0 if the instruction has
62 /// any side effects other than storing to the stack slot.
63 virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
66 virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
67 MachineBasicBlock *FBB,
68 const std::vector<MachineOperand> &Cond) const;