1 //===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcTargetMachine.h"
15 #include "llvm/Assembly/PrintModulePass.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/Scalar.h"
27 // Register the target.
28 RegisterTarget<SparcTargetMachine> X("sparc", " SPARC");
31 /// SparcTargetMachine ctor - Create an ILP32 architecture model
33 SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
34 : TargetMachine("Sparc", false, 4, 4),
35 Subtarget(M, FS), InstrInfo(Subtarget),
36 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
39 unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
40 std::string TT = M.getTargetTriple();
41 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
44 if (M.getEndianness() == Module::BigEndian &&
45 M.getPointerSize() == Module::Pointer32)
47 return 20; // BE/32 ==> Prefer sparc on sparc
49 return 5; // BE/32 ==> Prefer ppc elsewhere
51 else if (M.getEndianness() != Module::AnyEndianness ||
52 M.getPointerSize() != Module::AnyPointerSize)
53 return 0; // Match for some other target
58 /// addPassesToEmitFile - Add passes to the specified pass manager
59 /// to implement a static compiler for this target.
61 bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
62 CodeGenFileType FileType,
64 if (FileType != TargetMachine::AssemblyFile) return true;
66 // Run loop strength reduction before anything else.
67 if (!Fast) PM.add(createLoopStrengthReducePass());
69 // FIXME: Implement efficient support for garbage collection intrinsics.
70 PM.add(createLowerGCPass());
72 // FIXME: implement the invoke/unwind instructions!
73 PM.add(createLowerInvokePass());
75 // FIXME: implement the switch instruction in the instruction selector.
76 PM.add(createLowerSwitchPass());
78 // Print LLVM code input to instruction selector:
80 PM.add(new PrintFunctionPass());
82 // Make sure that no unreachable blocks are instruction selected.
83 PM.add(createUnreachableBlockEliminationPass());
85 PM.add(createSparcISelDag(*this));
87 // Print machine instructions as they were initially generated.
89 PM.add(createMachineFunctionPrinterPass(&std::cerr));
91 PM.add(createRegisterAllocator());
92 PM.add(createPrologEpilogCodeInserter());
94 // Print machine instructions after register allocation and prolog/epilog
97 PM.add(createMachineFunctionPrinterPass(&std::cerr));
99 PM.add(createSparcFPMoverPass(*this));
101 PM.add(createSparcDelaySlotFillerPass(*this));
103 // Print machine instructions after filling delay slots.
104 if (PrintMachineCode)
105 PM.add(createMachineFunctionPrinterPass(&std::cerr));
107 // Output assembly language.
108 PM.add(createSparcCodePrinterPass(Out, *this));
110 // Delete the MachineInstrs we generated, since they're no longer needed.
111 PM.add(createMachineCodeDeleter());