1 //===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcTargetMachine.h"
15 #include "llvm/CodeGen/Passes.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/Support/TargetRegistry.h"
20 extern "C" void LLVMInitializeSparcTarget() {
21 // Register the target.
22 RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
23 RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
26 /// SparcTargetMachine ctor - Create an ILP32 architecture model
28 SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
29 StringRef CPU, StringRef FS,
30 const TargetOptions &Options,
31 Reloc::Model RM, CodeModel::Model CM,
34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
35 Subtarget(TT, CPU, FS, *this, is64bit) {
40 /// Sparc Code Generator Pass Configuration Options.
41 class SparcPassConfig : public TargetPassConfig {
43 SparcPassConfig(SparcTargetMachine *TM, PassManagerBase &PM)
44 : TargetPassConfig(TM, PM) {}
46 SparcTargetMachine &getSparcTargetMachine() const {
47 return getTM<SparcTargetMachine>();
50 bool addInstSelector() override;
51 bool addPreEmitPass() override;
55 TargetPassConfig *SparcTargetMachine::createPassConfig(PassManagerBase &PM) {
56 return new SparcPassConfig(this, PM);
59 bool SparcPassConfig::addInstSelector() {
60 addPass(createSparcISelDag(getSparcTargetMachine()));
64 /// addPreEmitPass - This pass may be implemented by targets that want to run
65 /// passes immediately before machine code is emitted. This should return
66 /// true if -print-machineinstrs should print out the code after the passes.
67 bool SparcPassConfig::addPreEmitPass(){
68 addPass(createSparcDelaySlotFillerPass(getSparcTargetMachine()));
72 void SparcV8TargetMachine::anchor() { }
74 SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
75 StringRef TT, StringRef CPU,
77 const TargetOptions &Options,
81 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
84 void SparcV9TargetMachine::anchor() { }
86 SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
87 StringRef TT, StringRef CPU,
89 const TargetOptions &Options,
93 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {