1 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcV8TargetMachine.h"
15 #include "llvm/Assembly/PrintModulePass.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/Scalar.h"
27 // Register the target.
28 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
31 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
33 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
34 IntrinsicLowering *IL,
35 const std::string &FS)
36 : TargetMachine("SparcV8", IL, false, 4, 4),
37 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
40 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
41 std::string TT = M.getTargetTriple();
42 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
45 if (M.getEndianness() == Module::BigEndian &&
46 M.getPointerSize() == Module::Pointer32)
48 return 20; // BE/32 ==> Prefer sparcv8 on sparc
50 return 5; // BE/32 ==> Prefer ppc elsewhere
52 else if (M.getEndianness() != Module::AnyEndianness ||
53 M.getPointerSize() != Module::AnyPointerSize)
54 return 0; // Match for some other target
59 /// addPassesToEmitFile - Add passes to the specified pass manager
60 /// to implement a static compiler for this target.
62 bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
64 CodeGenFileType FileType,
66 if (FileType != TargetMachine::AssemblyFile) return true;
68 // FIXME: Implement efficient support for garbage collection intrinsics.
69 PM.add(createLowerGCPass());
71 // Replace malloc and free instructions with library calls.
72 PM.add(createLowerAllocationsPass());
74 // FIXME: implement the switch instruction in the instruction selector.
75 PM.add(createLowerSwitchPass());
77 // FIXME: implement the invoke/unwind instructions!
78 PM.add(createLowerInvokePass());
80 // Make sure that no unreachable blocks are instruction selected.
81 PM.add(createUnreachableBlockEliminationPass());
83 // FIXME: implement the select instruction in the instruction selector.
84 PM.add(createLowerSelectPass());
86 // Print LLVM code input to instruction selector:
88 PM.add(new PrintFunctionPass());
90 PM.add(createSparcV8SimpleInstructionSelector(*this));
92 // Print machine instructions as they were initially generated.
94 PM.add(createMachineFunctionPrinterPass(&std::cerr));
96 PM.add(createRegisterAllocator());
97 PM.add(createPrologEpilogCodeInserter());
99 // Print machine instructions after register allocation and prolog/epilog
101 if (PrintMachineCode)
102 PM.add(createMachineFunctionPrinterPass(&std::cerr));
104 PM.add(createSparcV8FPMoverPass(*this));
105 PM.add(createSparcV8DelaySlotFillerPass(*this));
107 // Print machine instructions after filling delay slots.
108 if (PrintMachineCode)
109 PM.add(createMachineFunctionPrinterPass(&std::cerr));
111 // Output assembly language.
112 PM.add(createSparcV8CodePrinterPass(Out, *this));
114 // Delete the MachineInstrs we generated, since they're no longer needed.
115 PM.add(createMachineCodeDeleter());