1 //===-- SparcTargetMachine.cpp - Define TargetMachine for Sparc -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcTargetMachine.h"
14 #include "SparcTargetObjectFile.h"
16 #include "llvm/CodeGen/Passes.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Support/TargetRegistry.h"
21 extern "C" void LLVMInitializeSparcTarget() {
22 // Register the target.
23 RegisterTargetMachine<SparcV8TargetMachine> X(TheSparcTarget);
24 RegisterTargetMachine<SparcV9TargetMachine> Y(TheSparcV9Target);
27 /// SparcTargetMachine ctor - Create an ILP32 architecture model
29 SparcTargetMachine::SparcTargetMachine(const Target &T, StringRef TT,
30 StringRef CPU, StringRef FS,
31 const TargetOptions &Options,
32 Reloc::Model RM, CodeModel::Model CM,
35 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
36 TLOF(make_unique<SparcELFTargetObjectFile>()),
37 Subtarget(TT, CPU, FS, *this, is64bit) {
41 SparcTargetMachine::~SparcTargetMachine() {}
44 /// Sparc Code Generator Pass Configuration Options.
45 class SparcPassConfig : public TargetPassConfig {
47 SparcPassConfig(SparcTargetMachine *TM, PassManagerBase &PM)
48 : TargetPassConfig(TM, PM) {}
50 SparcTargetMachine &getSparcTargetMachine() const {
51 return getTM<SparcTargetMachine>();
54 void addIRPasses() override;
55 bool addInstSelector() override;
56 bool addPreEmitPass() override;
60 TargetPassConfig *SparcTargetMachine::createPassConfig(PassManagerBase &PM) {
61 return new SparcPassConfig(this, PM);
64 void SparcPassConfig::addIRPasses() {
65 addPass(createAtomicExpandPass(&getSparcTargetMachine()));
67 TargetPassConfig::addIRPasses();
70 bool SparcPassConfig::addInstSelector() {
71 addPass(createSparcISelDag(getSparcTargetMachine()));
75 /// addPreEmitPass - This pass may be implemented by targets that want to run
76 /// passes immediately before machine code is emitted. This should return
77 /// true if -print-machineinstrs should print out the code after the passes.
78 bool SparcPassConfig::addPreEmitPass(){
79 addPass(createSparcDelaySlotFillerPass(getSparcTargetMachine()));
83 void SparcV8TargetMachine::anchor() { }
85 SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
86 StringRef TT, StringRef CPU,
88 const TargetOptions &Options,
92 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
95 void SparcV9TargetMachine::anchor() { }
97 SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
98 StringRef TT, StringRef CPU,
100 const TargetOptions &Options,
103 CodeGenOpt::Level OL)
104 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {