1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Sparc specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H
17 #include "SparcInstrInfo.h"
18 #include "SparcSubtarget.h"
19 #include "llvm/Target/TargetMachine.h"
23 class SparcTargetMachine : public LLVMTargetMachine {
24 SparcSubtarget Subtarget;
26 SparcTargetMachine(const Target &T, StringRef TT,
27 StringRef CPU, StringRef FS, const TargetOptions &Options,
28 Reloc::Model RM, CodeModel::Model CM,
29 CodeGenOpt::Level OL, bool is64bit);
31 const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; }
33 // Pass Pipeline Configuration
34 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
37 /// SparcV8TargetMachine - Sparc 32-bit target machine
39 class SparcV8TargetMachine : public SparcTargetMachine {
40 virtual void anchor();
42 SparcV8TargetMachine(const Target &T, StringRef TT,
43 StringRef CPU, StringRef FS,
44 const TargetOptions &Options,
45 Reloc::Model RM, CodeModel::Model CM,
46 CodeGenOpt::Level OL);
49 /// SparcV9TargetMachine - Sparc 64-bit target machine
51 class SparcV9TargetMachine : public SparcTargetMachine {
52 virtual void anchor();
54 SparcV9TargetMachine(const Target &T, StringRef TT,
55 StringRef CPU, StringRef FS,
56 const TargetOptions &Options,
57 Reloc::Model RM, CodeModel::Model CM,
58 CodeGenOpt::Level OL);
61 } // end namespace llvm