1 //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Sparc specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef SPARCTARGETMACHINE_H
15 #define SPARCTARGETMACHINE_H
17 #include "SparcInstrInfo.h"
18 #include "SparcSubtarget.h"
19 #include "llvm/Target/TargetMachine.h"
23 class SparcTargetMachine : public LLVMTargetMachine {
24 SparcSubtarget Subtarget;
26 SparcTargetMachine(const Target &T, StringRef TT,
27 StringRef CPU, StringRef FS, const TargetOptions &Options,
28 Reloc::Model RM, CodeModel::Model CM,
29 CodeGenOpt::Level OL, bool is64bit);
31 const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; }
33 SparcSubtarget *getSubtargetImpl() {
34 return static_cast<SparcSubtarget *>(TargetMachine::getSubtargetImpl());
37 // Pass Pipeline Configuration
38 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
39 bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
42 /// SparcV8TargetMachine - Sparc 32-bit target machine
44 class SparcV8TargetMachine : public SparcTargetMachine {
45 virtual void anchor();
47 SparcV8TargetMachine(const Target &T, StringRef TT,
48 StringRef CPU, StringRef FS,
49 const TargetOptions &Options,
50 Reloc::Model RM, CodeModel::Model CM,
51 CodeGenOpt::Level OL);
54 /// SparcV9TargetMachine - Sparc 64-bit target machine
56 class SparcV9TargetMachine : public SparcTargetMachine {
57 virtual void anchor();
59 SparcV9TargetMachine(const Target &T, StringRef TT,
60 StringRef CPU, StringRef FS,
61 const TargetOptions &Options,
62 Reloc::Model RM, CodeModel::Model CM,
63 CodeGenOpt::Level OL);
66 } // end namespace llvm