1 //===-- FPMover.cpp - SparcV8 double-precision floating point move fixer --===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Expand FpMOVD/FpABSD/FpNEGD instructions into their single-precision pieces.
12 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/MachineFunctionPass.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "llvm/ADT/Statistic.h"
18 #include "llvm/Support/Debug.h"
22 Statistic<> NumFpDs("fpmover", "Number of instructions translated");
23 Statistic<> NoopFpDs("fpmover", "Number of noop instructions removed");
25 struct FPMover : public MachineFunctionPass {
26 /// Target machine description which we query for reg. names, data
31 FPMover(TargetMachine &tm) : TM(tm) { }
33 virtual const char *getPassName() const {
34 return "SparcV8 Double-FP Move Fixer";
37 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
38 bool runOnMachineFunction(MachineFunction &F) {
40 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
42 Changed |= runOnMachineBasicBlock(*FI);
47 } // end of anonymous namespace
49 /// createSparcV8FPMoverPass - Returns a pass that turns FpMOVD
50 /// instructions into FMOVS instructions
52 FunctionPass *llvm::createSparcV8FPMoverPass(TargetMachine &tm) {
53 return new FPMover(tm);
56 /// getDoubleRegPair - Given a DFP register, return the even and odd FP
57 /// registers that correspond to it.
58 static void getDoubleRegPair(unsigned DoubleReg, unsigned &EvenReg,
60 static const unsigned EvenHalvesOfPairs[] = {
61 V8::F0, V8::F2, V8::F4, V8::F6, V8::F8, V8::F10, V8::F12, V8::F14,
62 V8::F16, V8::F18, V8::F20, V8::F22, V8::F24, V8::F26, V8::F28, V8::F30
64 static const unsigned OddHalvesOfPairs[] = {
65 V8::F1, V8::F3, V8::F5, V8::F7, V8::F9, V8::F11, V8::F13, V8::F15,
66 V8::F17, V8::F19, V8::F21, V8::F23, V8::F25, V8::F27, V8::F29, V8::F31
68 static const unsigned DoubleRegsInOrder[] = {
69 V8::D0, V8::D1, V8::D2, V8::D3, V8::D4, V8::D5, V8::D6, V8::D7, V8::D8,
70 V8::D9, V8::D10, V8::D11, V8::D12, V8::D13, V8::D14, V8::D15
72 for (unsigned i = 0; i < sizeof(DoubleRegsInOrder)/sizeof(unsigned); ++i)
73 if (DoubleRegsInOrder[i] == DoubleReg) {
74 EvenReg = EvenHalvesOfPairs[i];
75 OddReg = OddHalvesOfPairs[i];
78 assert(0 && "Can't find reg");
81 /// runOnMachineBasicBlock - Fixup FpMOVD instructions in this MBB.
83 bool FPMover::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
85 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ) {
86 MachineInstr *MI = I++;
87 if (MI->getOpcode() == V8::FpMOVD || MI->getOpcode() == V8::FpABSD ||
88 MI->getOpcode() == V8::FpNEGD) {
90 unsigned DestDReg = MI->getOperand(0).getReg();
91 unsigned SrcDReg = MI->getOperand(1).getReg();
92 if (DestDReg == SrcDReg && MI->getOpcode() == V8::FpMOVD) {
93 MBB.erase(MI); // Eliminate the noop copy.
98 unsigned EvenSrcReg = 0, OddSrcReg = 0, EvenDestReg = 0, OddDestReg = 0;
99 getDoubleRegPair(DestDReg, EvenDestReg, OddDestReg);
100 getDoubleRegPair(SrcDReg, EvenSrcReg, OddSrcReg);
102 if (MI->getOpcode() == V8::FpMOVD)
103 MI->setOpcode(V8::FMOVS);
104 else if (MI->getOpcode() == V8::FpNEGD)
105 MI->setOpcode(V8::FNEGS);
106 else if (MI->getOpcode() == V8::FpABSD)
107 MI->setOpcode(V8::FABSS);
109 assert(0 && "Unknown opcode!");
111 MI->SetMachineOperandReg(0, EvenDestReg);
112 MI->SetMachineOperandReg(1, EvenSrcReg);
113 DEBUG(std::cerr << "FPMover: the modified instr is: " << *MI);
114 // Insert copy for the other half of the double.
115 if (DestDReg != SrcDReg) {
116 MI = BuildMI(MBB, I, V8::FMOVS, 1, OddDestReg).addReg(OddSrcReg);
117 DEBUG(std::cerr << "FPMover: the inserted instr is: " << *MI);