1 //===- SparcV8InstrFormats.td - SparcV8 Instr Formats ------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Format #2 instruction classes in the SparcV8
12 //===----------------------------------------------------------------------===//
14 class F2 : InstV8 { // Format 2 instructions
18 let Inst{24-22} = op2;
19 let Inst{21-0} = imm22;
22 // Specific F2 classes: SparcV8 manual, page 44
24 class F2_1<bits<3> op2Val, string name> : F2 {
34 class F2_2<bits<4> condVal, bits<3> op2Val, string name> : F2 {
36 bit annul = 0; // currently unused
43 let Inst{28-25} = cond;
46 //===----------------------------------------------------------------------===//
47 // Format #3 instruction classes in the SparcV8
48 //===----------------------------------------------------------------------===//
54 let op{1} = 1; // Op = 2 or 3
56 let Inst{24-19} = op3;
57 let Inst{18-14} = rs1;
60 // Specific F3 classes: SparcV8 manual, page 44
62 class F3_1<bits<2> opVal, bits<6> op3val, string name> : F3 {
70 let Inst{13} = 0; // i field = 0
71 let Inst{12-5} = asi; // address space identifier
75 class F3_2<bits<2> opVal, bits<6> op3val, string name> : F3 {
82 let Inst{13} = 1; // i field = 1
83 let Inst{12-0} = simm13;
87 class F3_3<bits<2> opVal, bits<6> op3val, bits<9> opfval, string name> : F3 {
95 let Inst{13-5} = opfval; // fp opcode