1 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcV8TargetMachine.h"
15 #include "llvm/Module.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/Target/TargetOptions.h"
20 #include "llvm/Target/TargetMachineRegistry.h"
21 #include "llvm/Transforms/Scalar.h"
26 // Register the target.
27 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
30 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
32 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
33 IntrinsicLowering *IL)
34 : TargetMachine("SparcV8", IL, false, 4, 4, 8, 4, 8, 4, 2, 1, 4),
35 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
38 unsigned SparcV8TargetMachine::getJITMatchQuality() {
39 return 0; // No JIT yet.
42 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
43 if (M.getEndianness() == Module::BigEndian &&
44 M.getPointerSize() == Module::Pointer32)
46 return 20; // BE/32 ==> Prefer sparcv8 on sparc
48 return 5; // BE/32 ==> Prefer ppc elsewhere
50 else if (M.getEndianness() != Module::AnyEndianness ||
51 M.getPointerSize() != Module::AnyPointerSize)
52 return 0; // Match for some other target
54 return getJITMatchQuality()/2;
57 /// addPassesToEmitAssembly - Add passes to the specified pass manager
58 /// to implement a static compiler for this target.
60 bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
62 // FIXME: Implement efficient support for garbage collection intrinsics.
63 PM.add(createLowerGCPass());
65 // Replace malloc and free instructions with library calls.
66 PM.add(createLowerAllocationsPass());
68 // FIXME: implement the switch instruction in the instruction selector.
69 PM.add(createLowerSwitchPass());
71 // FIXME: implement the invoke/unwind instructions!
72 PM.add(createLowerInvokePass());
74 PM.add(createLowerConstantExpressionsPass());
76 // Make sure that no unreachable blocks are instruction selected.
77 PM.add(createUnreachableBlockEliminationPass());
79 // FIXME: implement the select instruction in the instruction selector.
80 PM.add(createLowerSelectPass());
82 PM.add(createSparcV8SimpleInstructionSelector(*this));
84 // Print machine instructions as they were initially generated.
86 PM.add(createMachineFunctionPrinterPass(&std::cerr));
88 PM.add(createRegisterAllocator());
89 PM.add(createPrologEpilogCodeInserter());
91 // Print machine instructions after register allocation and prolog/epilog
94 PM.add(createMachineFunctionPrinterPass(&std::cerr));
96 PM.add(createSparcV8FPMoverPass(*this));
97 PM.add(createSparcV8DelaySlotFillerPass(*this));
99 // Print machine instructions after filling delay slots.
100 if (PrintMachineCode)
101 PM.add(createMachineFunctionPrinterPass(&std::cerr));
103 // Output assembly language.
104 PM.add(createSparcV8CodePrinterPass(Out, *this));
106 // Delete the MachineInstrs we generated, since they're no longer needed.
107 PM.add(createMachineCodeDeleter());
111 /// addPassesToJITCompile - Add passes to the specified pass manager to
112 /// implement a fast dynamic compiler for this target.
114 void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
115 // FIXME: Implement efficient support for garbage collection intrinsics.
116 PM.add(createLowerGCPass());
118 // Replace malloc and free instructions with library calls.
119 PM.add(createLowerAllocationsPass());
121 // FIXME: implement the switch instruction in the instruction selector.
122 PM.add(createLowerSwitchPass());
124 // FIXME: implement the invoke/unwind instructions!
125 PM.add(createLowerInvokePass());
127 PM.add(createLowerConstantExpressionsPass());
129 // Make sure that no unreachable blocks are instruction selected.
130 PM.add(createUnreachableBlockEliminationPass());
132 // FIXME: implement the select instruction in the instruction selector.
133 PM.add(createLowerSelectPass());
135 PM.add(createSparcV8SimpleInstructionSelector(TM));
137 // Print machine instructions as they were initially generated.
138 if (PrintMachineCode)
139 PM.add(createMachineFunctionPrinterPass(&std::cerr));
141 PM.add(createRegisterAllocator());
142 PM.add(createPrologEpilogCodeInserter());
144 // Print machine instructions after register allocation and prolog/epilog
146 if (PrintMachineCode)
147 PM.add(createMachineFunctionPrinterPass(&std::cerr));
149 PM.add(createSparcV8FPMoverPass(TM));
150 PM.add(createSparcV8DelaySlotFillerPass(TM));
152 // Print machine instructions after filling delay slots.
153 if (PrintMachineCode)
154 PM.add(createMachineFunctionPrinterPass(&std::cerr));