1 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcV8TargetMachine.h"
15 #include "llvm/Assembly/PrintModulePass.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/Scalar.h"
27 // Register the target.
28 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
31 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
33 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
34 IntrinsicLowering *IL,
35 const std::string &FS)
36 : TargetMachine("SparcV8", IL, false, 4, 4),
37 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
40 unsigned SparcV8TargetMachine::getJITMatchQuality() {
41 return 0; // No JIT yet.
44 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
45 std::string TT = M.getTargetTriple();
46 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
49 if (M.getEndianness() == Module::BigEndian &&
50 M.getPointerSize() == Module::Pointer32)
52 return 20; // BE/32 ==> Prefer sparcv8 on sparc
54 return 5; // BE/32 ==> Prefer ppc elsewhere
56 else if (M.getEndianness() != Module::AnyEndianness ||
57 M.getPointerSize() != Module::AnyPointerSize)
58 return 0; // Match for some other target
60 return getJITMatchQuality()/2;
63 /// addPassesToEmitFile - Add passes to the specified pass manager
64 /// to implement a static compiler for this target.
66 bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
68 CodeGenFileType FileType) {
69 if (FileType != TargetMachine::AssemblyFile) return true;
71 // FIXME: Implement efficient support for garbage collection intrinsics.
72 PM.add(createLowerGCPass());
74 // Replace malloc and free instructions with library calls.
75 PM.add(createLowerAllocationsPass());
77 // FIXME: implement the switch instruction in the instruction selector.
78 PM.add(createLowerSwitchPass());
80 // FIXME: implement the invoke/unwind instructions!
81 PM.add(createLowerInvokePass());
83 PM.add(createLowerConstantExpressionsPass());
85 // Make sure that no unreachable blocks are instruction selected.
86 PM.add(createUnreachableBlockEliminationPass());
88 // FIXME: implement the select instruction in the instruction selector.
89 PM.add(createLowerSelectPass());
91 // Print LLVM code input to instruction selector:
93 PM.add(new PrintFunctionPass());
95 PM.add(createSparcV8SimpleInstructionSelector(*this));
97 // Print machine instructions as they were initially generated.
99 PM.add(createMachineFunctionPrinterPass(&std::cerr));
101 PM.add(createRegisterAllocator());
102 PM.add(createPrologEpilogCodeInserter());
104 // Print machine instructions after register allocation and prolog/epilog
106 if (PrintMachineCode)
107 PM.add(createMachineFunctionPrinterPass(&std::cerr));
109 PM.add(createSparcV8FPMoverPass(*this));
110 PM.add(createSparcV8DelaySlotFillerPass(*this));
112 // Print machine instructions after filling delay slots.
113 if (PrintMachineCode)
114 PM.add(createMachineFunctionPrinterPass(&std::cerr));
116 // Output assembly language.
117 PM.add(createSparcV8CodePrinterPass(Out, *this));
119 // Delete the MachineInstrs we generated, since they're no longer needed.
120 PM.add(createMachineCodeDeleter());
124 /// addPassesToJITCompile - Add passes to the specified pass manager to
125 /// implement a fast dynamic compiler for this target.
127 void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
128 // FIXME: Implement efficient support for garbage collection intrinsics.
129 PM.add(createLowerGCPass());
131 // Replace malloc and free instructions with library calls.
132 PM.add(createLowerAllocationsPass());
134 // FIXME: implement the switch instruction in the instruction selector.
135 PM.add(createLowerSwitchPass());
137 // FIXME: implement the invoke/unwind instructions!
138 PM.add(createLowerInvokePass());
140 PM.add(createLowerConstantExpressionsPass());
142 // Make sure that no unreachable blocks are instruction selected.
143 PM.add(createUnreachableBlockEliminationPass());
145 // FIXME: implement the select instruction in the instruction selector.
146 PM.add(createLowerSelectPass());
148 // Print LLVM code input to instruction selector:
149 if (PrintMachineCode)
150 PM.add(new PrintFunctionPass());
152 PM.add(createSparcV8SimpleInstructionSelector(TM));
154 // Print machine instructions as they were initially generated.
155 if (PrintMachineCode)
156 PM.add(createMachineFunctionPrinterPass(&std::cerr));
158 PM.add(createRegisterAllocator());
159 PM.add(createPrologEpilogCodeInserter());
161 // Print machine instructions after register allocation and prolog/epilog
163 if (PrintMachineCode)
164 PM.add(createMachineFunctionPrinterPass(&std::cerr));
166 PM.add(createSparcV8FPMoverPass(TM));
167 PM.add(createSparcV8DelaySlotFillerPass(TM));
169 // Print machine instructions after filling delay slots.
170 if (PrintMachineCode)
171 PM.add(createMachineFunctionPrinterPass(&std::cerr));