1 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcV8TargetMachine.h"
15 #include "llvm/Assembly/PrintModulePass.h"
16 #include "llvm/Module.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/Scalar.h"
23 #include "llvm/Support/CommandLine.h"
28 // Register the target.
29 RegisterTarget<SparcV8TargetMachine> X("sparcv8"," SPARC V8 (experimental)");
31 cl::opt<bool> EnableV8DAGDAG("enable-v8-dag-isel", cl::Hidden,
32 cl::desc("Enable DAG-to-DAG isel for V8"),
36 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
38 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
39 IntrinsicLowering *IL,
40 const std::string &FS)
41 : TargetMachine("SparcV8", IL, false, 4, 4),
42 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
45 unsigned SparcV8TargetMachine::getModuleMatchQuality(const Module &M) {
46 std::string TT = M.getTargetTriple();
47 if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
50 if (M.getEndianness() == Module::BigEndian &&
51 M.getPointerSize() == Module::Pointer32)
53 return 20; // BE/32 ==> Prefer sparcv8 on sparc
55 return 5; // BE/32 ==> Prefer ppc elsewhere
57 else if (M.getEndianness() != Module::AnyEndianness ||
58 M.getPointerSize() != Module::AnyPointerSize)
59 return 0; // Match for some other target
64 /// addPassesToEmitFile - Add passes to the specified pass manager
65 /// to implement a static compiler for this target.
67 bool SparcV8TargetMachine::addPassesToEmitFile(PassManager &PM,
69 CodeGenFileType FileType,
71 if (FileType != TargetMachine::AssemblyFile) return true;
73 // FIXME: Implement efficient support for garbage collection intrinsics.
74 PM.add(createLowerGCPass());
76 // Make sure that no unreachable blocks are instruction selected.
77 PM.add(createUnreachableBlockEliminationPass());
79 // FIXME: implement the invoke/unwind instructions!
80 PM.add(createLowerInvokePass());
82 // FIXME: implement the switch instruction in the instruction selector.
83 PM.add(createLowerSwitchPass());
85 // Print LLVM code input to instruction selector:
87 PM.add(new PrintFunctionPass());
89 if (!EnableV8DAGDAG) {
90 // Replace malloc and free instructions with library calls.
91 PM.add(createLowerAllocationsPass());
92 PM.add(createLowerSelectPass());
93 PM.add(createSparcV8SimpleInstructionSelector(*this));
95 PM.add(createSparcV8ISelDag(*this));
97 // Print machine instructions as they were initially generated.
99 PM.add(createMachineFunctionPrinterPass(&std::cerr));
101 PM.add(createRegisterAllocator());
102 PM.add(createPrologEpilogCodeInserter());
104 // Print machine instructions after register allocation and prolog/epilog
106 if (PrintMachineCode)
107 PM.add(createMachineFunctionPrinterPass(&std::cerr));
109 PM.add(createSparcV8FPMoverPass(*this));
111 PM.add(createSparcV8DelaySlotFillerPass(*this));
113 // Print machine instructions after filling delay slots.
114 if (PrintMachineCode)
115 PM.add(createMachineFunctionPrinterPass(&std::cerr));
117 // Output assembly language.
118 PM.add(createSparcV8CodePrinterPass(Out, *this));
120 // Delete the MachineInstrs we generated, since they're no longer needed.
121 PM.add(createMachineCodeDeleter());