1 //===-- SparcV8TargetMachine.cpp - Define TargetMachine for SparcV8 -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "SparcV8TargetMachine.h"
15 #include "llvm/Module.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/Target/TargetMachineImpls.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Transforms/Scalar.h"
23 // allocateSparcV8TargetMachine - Allocate and return a subclass of
24 // TargetMachine that implements the SparcV8 backend.
26 TargetMachine *llvm::allocateSparcV8TargetMachine(const Module &M,
27 IntrinsicLowering *IL) {
28 return new SparcV8TargetMachine(M, IL);
31 /// SparcV8TargetMachine ctor - Create an ILP32 architecture model
33 SparcV8TargetMachine::SparcV8TargetMachine(const Module &M,
34 IntrinsicLowering *IL)
35 : TargetMachine("SparcV8", IL, true, 4, 4, 4, 4, 4),
36 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0), JITInfo(*this) {
39 /// addPassesToEmitAssembly - Add passes to the specified pass manager
40 /// to implement a static compiler for this target.
42 bool SparcV8TargetMachine::addPassesToEmitAssembly(PassManager &PM,
44 // FIXME: Implement efficient support for garbage collection intrinsics.
45 PM.add(createLowerGCPass());
47 // Replace malloc and free instructions with library calls.
48 PM.add(createLowerAllocationsPass());
50 // FIXME: implement the switch instruction in the instruction selector.
51 PM.add(createLowerSwitchPass());
53 // FIXME: implement the invoke/unwind instructions!
54 PM.add(createLowerInvokePass());
56 PM.add(createSparcV8SimpleInstructionSelector(*this));
58 // Print machine instructions as they were initially generated.
60 PM.add(createMachineFunctionPrinterPass(&std::cerr));
62 PM.add(createRegisterAllocator());
63 PM.add(createPrologEpilogCodeInserter());
65 // Print machine instructions after register allocation and prolog/epilog
68 PM.add(createMachineFunctionPrinterPass(&std::cerr));
70 PM.add(createSparcV8DelaySlotFillerPass(*this));
72 // Print machine instructions after filling delay slots.
74 PM.add(createMachineFunctionPrinterPass(&std::cerr));
76 // Output assembly language.
77 PM.add(createSparcV8CodePrinterPass(Out, *this));
79 // Delete the MachineInstrs we generated, since they're no longer needed.
80 PM.add(createMachineCodeDeleter());
84 /// addPassesToJITCompile - Add passes to the specified pass manager to
85 /// implement a fast dynamic compiler for this target.
87 void SparcV8JITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
88 // FIXME: Implement efficient support for garbage collection intrinsics.
89 PM.add(createLowerGCPass());
91 // Replace malloc and free instructions with library calls.
92 PM.add(createLowerAllocationsPass());
94 // FIXME: implement the switch instruction in the instruction selector.
95 PM.add(createLowerSwitchPass());
97 // FIXME: implement the invoke/unwind instructions!
98 PM.add(createLowerInvokePass());
100 PM.add(createSparcV8SimpleInstructionSelector(TM));
102 // Print machine instructions as they were initially generated.
103 if (PrintMachineCode)
104 PM.add(createMachineFunctionPrinterPass(&std::cerr));
106 PM.add(createRegisterAllocator());
107 PM.add(createPrologEpilogCodeInserter());
109 // Print machine instructions after register allocation and prolog/epilog
111 if (PrintMachineCode)
112 PM.add(createMachineFunctionPrinterPass(&std::cerr));
114 PM.add(createSparcV8DelaySlotFillerPass(TM));
116 // Print machine instructions after filling delay slots.
117 if (PrintMachineCode)
118 PM.add(createMachineFunctionPrinterPass(&std::cerr));